This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
RE: Pushing the limits on vector modes
- From: "Paulo Matos" <pmatos at broadcom dot com>
- To: "amylaar at spamcop dot net" <amylaar at spamcop dot net>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Fri, 17 May 2013 14:29:06 +0000
- Subject: RE: Pushing the limits on vector modes
- References: <19EB96622A777C4AB91610E763265F461E0B94 at SJEXCHMB14 dot corp dot ad dot broadcom dot com> <20130517101212 dot 8ojssfygxwggwkco-nzlynne at webmail dot spamcop dot net>
amylaar,
Do you recall how I can get those ARC branches, where they branches in official GCC SVN?
Paulo Matos
> -----Original Message-----
> From: amylaar@spamcop.net [mailto:amylaar@spamcop.net]
> Sent: 17 May 2013 15:12
> To: Paulo Matos
> Cc: gcc@gcc.gnu.org
> Subject: Re: Pushing the limits on vector modes
>
> Quoting Paulo Matos <pmatos@broadcom.com>:
>
> > Hello,
> >
> > I am trying to model a predicate register mode that acts like a
> > vector. We have a few predicate registers that have 8 bits in size
> > but they are set accordingly to the mode of operation (not
> > necessarily a comparison). Word size is 64.
>
> Yes need some surgery to the mode generator machinery. I had the same
> problem with the mxp port, which you can still find in older ARC
> branches.