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Re: Pushing the limits on vector modes
- From: amylaar at spamcop dot net
- To: Paulo Matos <pmatos at broadcom dot com>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Fri, 17 May 2013 10:12:12 -0400
- Subject: Re: Pushing the limits on vector modes
- References: <19EB96622A777C4AB91610E763265F461E0B94 at SJEXCHMB14 dot corp dot ad dot broadcom dot com>
Quoting Paulo Matos <pmatos@broadcom.com>:
Hello,
I am trying to model a predicate register mode that acts like a
vector. We have a few predicate registers that have 8 bits in size
but they are set accordingly to the mode of operation (not
necessarily a comparison). Word size is 64.
Yes need some surgery to the mode generator machinery. I had the same
problem with the mxp port, which you can still find in older ARC
branches.