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Re: Confusion about delay slots and using condition-code register
- From: Hans-Peter Nilsson <hp at bitrange dot com>
- To: Alan Lehotsky <apl at alum dot mit dot edu>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Thu, 14 Mar 2013 23:39:53 -0400 (EDT)
- Subject: Re: Confusion about delay slots and using condition-code register
- References: <5B1B10F3-2F73-43F7-9096-1FD64F18CB4F@me.com>
On Wed, 6 Mar 2013, Alan Lehotsky wrote:
> So, am I constructing my RTL incorrectly?
No.
> Do I need to be
> making the clobbers inside a parallel instead of just emitting
> them sequentially?
Exactly.
> (define_insn "*addsi"
> [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm,rS,rm")
> (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0, 0, 0,rm")
> (match_operand:SI 2 "general_operand" "QI, K, i,rm")))]
> ,........
Missing clobber.
That's right, define_insn has an implicit parallel when more
than one RTL clause is present, but you must emit one explicitly
in define_expand.
brgds, H-P