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Re: Confusion about delay slots and using condition-code register
- From: Eric Botcazou <ebotcazou at adacore dot com>
- To: apl at alum dot mit dot edu
- Cc: gcc at gcc dot gnu dot org
- Date: Thu, 07 Mar 2013 15:32:11 +0100
- Subject: Re: Confusion about delay slots and using condition-code register
- References: <5B1B10F3-2F73-43F7-9096-1FD64F18CB4F@me.com>
> I emit (clobber (reg:CC CCreg)) with every instruction that can set
> condition codes, but it appears that nearly all of them are removed before
> we reach reorg where mark_referenced_resources() or mark_set_resources()
> would detect a conflict of the CCreg's.
Clobbers shouldn't be removed if they are needed for an insn to match so...
> The define_expand pattern for add looks like
>
> (define_expand "add<S:mode>3"
> [(set (match_operand:S 0 "nonimmediate_operand")
> (plus:S (match_operand:S 1 "general_operand")
> (match_operand:S 2 "general_operand")))
> (clobber (reg:CC CC_REGNUM))]
> ""
> .....
> })
> has corresponding define_insn's are
>
>
> (define_insn "*addsi"
> [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm,rS,rm")
> (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0, 0, 0,rm")
> (match_operand:SI 2 "general_operand" "QI, K,i,rm")))]
,........
> )
... why is there no clobber in the pattern if the instruction clobbers CC?
--
Eric Botcazou