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Re: Does neon_vset_lane<mode> expand wrong code when BYTES_BIG_ENDIAN?
- From: "Joseph S. Myers" <joseph at codesourcery dot com>
- To: Xinyu Qi <xyqi at marvell dot com>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Thu, 5 Jan 2012 15:33:56 +0000 (UTC)
- Subject: Re: Does neon_vset_lane<mode> expand wrong code when BYTES_BIG_ENDIAN?
- References: <4737A960563B524DA805CA602BE04B3063367E75F7@SC-VEXCH2.marvell.com>
On Wed, 4 Jan 2012, Xinyu Qi wrote:
> It seems these two parts of the code dealing with BYTE_BIG_ENDIAN will
> cancel each other, and result in the original imm op unchanged.
Yes, that's correct. Lane numbers for NEON intrinsics are the same as
those used in assembly instructions, but for big-endian they are different
from those used in the target-independent semantics of the RTL
intermediate representation.
> Is there something wrong with these code?
No, see <http://gcc.gnu.org/ml/gcc-patches/2010-06/msg00409.html> where I
explain this at greater length.
--
Joseph S. Myers
joseph@codesourcery.com