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Announcing the Port of Intel(r) Cilk (TM) Plus into GCC
- From: "Iyer, Balaji V" <balaji dot v dot iyer at intel dot com>
- To: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Mon, 15 Aug 2011 13:30:06 -0700
- Subject: Announcing the Port of Intel(r) Cilk (TM) Plus into GCC
This letter describes the recently created GCC branch called "cilkplus" that ports the Intel(R) Cilk(TM) Plus language extensions to the C and C++ front-ends of gcc-4.7. We are looking for collaborators and advice as we proceed - both on this open-source gcc project, and on the open language specification. The compiler and its associated runtime are available at: http://gcc.gnu.org/svn/gcc/branches/cilkplus . The URL for the patch is available at: http://software.intel.com/file/38093 .
Intel Cilk Plus is a set of C and C++ constructs for task-parallel and data-parallel programming for improving performance on multicore and vector processors. This language extension includes the following features:
1. Three keywords provide a simple yet powerful model for parallel programming: _Cilk_spawn, _Cilk_sync and _Cilk_for. Reducers provide an easy, lock-free way to deal with shared data.
2. Simple array notations including elemental functions allow programmers to easily use data-parallelism.
3. Pragmas communicate SIMD information to the vectorizer to help ensure that loops are vectorized correctly.
The implementation of Intel Cilk Plus language extensions to gcc requires the above patches to the C and C++ front-ends, plus a copy of the Intel Cilk Plus runtime library (Cilk Plus RTL). Both of these have been checked into the new gcc branch. The Cilk Plus RTL is being maintained by using an upstream, BSD-licensed version available at http://www.cilkplus.org . Changes to the Cilk Plus RTL are welcome and must be contributed to the upstream version via this web site. A contribution process is in place for receiving such changes; see http://www.cilkplus.org for details.
In this release, the C and C++ compiler parsers now accept the three keywords _Cilk_spawn, _Cilk_sync, and _Cilk_for, as well as a pragma to adjust the grainsize of _Cilk_for. The list below provides a brief explanation of each of the keywords. For more details, see the "Intel(r) Cilk(tm) Plus Language Specification" at http://www.cilkplus.org .
1. _Cilk_spawn - Annotates a function-call and indicates that execution may (but is not required to) continue without waiting for the function to return. The syntax is:
[ <type> <retval> = ] _Cilk_spawn <postfix_expression> (<expression-list> (optional)) ;
2. _Cilk_sync - Indicates that all the statements in the current Cilk block must finish executing before any statements after the _Cilk_sync begin executing. The syntax is:
3. _Cilk_for - Is a variant of a for-statement where any or all iterations may (but are not required to) execute in parallel. You can optionally precede _Cilk_for with a grainsize-pragma to specify the number of serial iterations desired for each chunk of the parallel loop. If there is no grainsize pragma or if the grainsize evaluates to '0', then the runtime will pick a grainsize using its own internal heuristics. The syntax:
[ #pragma cilk grainsize = <expression> ] _Cilk_for (<assignment_expression> ; <condition> ; <expression>)
The parser will accept these keywords and insert the appropriate functions to interact with the runtime library. Along with these keywords, you can use #pragma simd directives to communicate loop information to the vectorizer so it can generate better vectorized code. The five #pragma simd directives are: vectorlength, private, linear, reduction, and assert. The list below summarizes the five directives. For a detailed explanation please refer to the "Intel(r) Cilk(tm) Plus Language Specification" at http://www.cilkplus.org .
1) #pragma simd vectorlength (n1, n2 ...): Specify a choice vector width that the back-end may use to vectorize the loop.
2) #pragma simd private (var1, var2, ...): Specify a set of variables for which each loop iteration is independent of each other iterations.
3) #pragma simd linear (var1:stride1, var2:stride2, ...): Specify a set of variables that increase monotonically in each iteration of the loop.
4) #pragma simd reduction (operator: var1, var2...): Specify a set of variables whose value is computed by vector reduction using the specified operator.
5) #pragma simd assert: Directs the compiler to halt if the vectorizer is unable to vectorize the loop.
The current implementation of the runtime library has been tested on x86 (both 32 and 64 bit) architectures. In theory, the runtime library should not be too difficult for you to port to other architectures. However, be aware that access to shared variables currently assumes sequential consistency, so architectures that use a different memory model may require you to insert additional memory barriers.
These language extensions provide a simple, well-structured, and powerful model for parallel programming. Intel hopes that you will find these extensions to be a useful and significant enhancement to the GCC C and C++ compiler. In this initial release, the array notations and elemental functions present in the full Intel(r) Cilk(tm) Plus Language Specification are not yet implemented. Intel welcomes help and advice from all contributors in the GCC community. Please see http://www.cilkplus.org for more information on community involvement in this open-source project.
If you have comments, suggestions or questions, please contact Balaji V. Iyer at balaji.v.iyer -AT- intel.com.
Balaji V. Iyer,
Intel and Cilk are trademarks of Intel Corporation in the U.S. and/or other countries.
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