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Re: Strange vect.exp test results


Hi Ira,

thanks for your answer, however:

On 31 May 2011 08:06, Ira Rosen <IRAR@il.ibm.com> wrote:
>> This test fails for me because I get 4 vectorized loops instead of 3.
>> There are multiple other tests that generate more vectorization then
>> expected. I'd like to understand the reason for these failures, but I
>> can't see what motivates the choice of only 3 vectorized loops among
>> the 4 vectorizable loops of the test. Can someone enlighten me?
>
> The fourth loop (line 104) has only 3 scalar iterations, too few to
> vectorize unless your target has vectors of 2 shorts.

My port has vectors of 2 shorts, but I don't expose them directly to
GCC. The V2HI type is defined, but UNITS_PER_SIMD_WORD always returns
8, which I believe should prompt GCC to use V4HI which is also
defined.

Regarding slp-3.c I don't get why the loop you point isn't
vectorizable. I my version of the file (4.5 branch), I see 9 short
copies in a loop iterating 4 times (a total of 36 short assignements).
After the vectorization pass, I get 9 V4HI assignments which seem
totally right. I don't see why this shouldn't be the case...

Many thanks,
Fred


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