Re: gcc-4.5/4.4: Bug in .subreg1 pass?

[Jeff Law <law at redhat dot com>]

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On 02/24/11 07:05, Georg-Johann Lay wrote:
> Hi, I am trying to track down/fix PR target/45291. The problem is that
> pass .subreg1 generates invalid subregs.
> 
> According to internals "10.8 Registers and Memory, Normal Subregs"
> a normal (non-paradoxical) subreg as Lvalue sets the specifyed subreg
> and leaves the remaining part of the target word undefined. This
> happens in the following test case
> 
> unsigned char func1(void);
> void funct2(int l);
> 
> void dummy(void)
> {
>     int l = 256 * func1() + func1();
>     if (l > 256)
>         return;
> 
>     func1();
>     funct2(l);
> }
> 
> compiled with
> 
> avr-gcc -S pr45291.c -O2 -mmcu=atmega8 -dP -da -v
> 
> Using built-in specs.
> COLLECT_GCC=/home/georg/gcc/install/gcc-4.5/bin/avr-gcc
> COLLECT_LTO_WRAPPER=/mnt/nfs/home/georg/gcc/install/gcc-4.5/bin/../libexec/gcc/avr/4.5.3/lto-wrapper
> Target: avr
> Configured with:
> /gnu/source/gcc.gnu.org/branches/gcc-4_5-branch/configure --target=avr
> --prefix=/home/georg/gcc/install/gcc-4.5 --enable-languages=c,c++
> --disable-libssp --disable-libada --disable-nls --disable-shared
> Thread model: single
> gcc version 4.5.3 20110223 (prerelease) (GCC)
> COLLECT_GCC_OPTIONS='-O2' '-S' '-mmcu=atmega8' '-dP' '-da' '-v'
>  /mnt/nfs/home/georg/gcc/install/gcc-4.5/bin/../libexec/gcc/avr/4.5.3/cc1
> -quiet -v -imultilib avr4 -iprefix
> /mnt/nfs/home/georg/gcc/install/gcc-4.5/bin/../lib/gcc/avr/4.5.3/
> pr45291.c -quiet -dumpbase pr45291.c -dP -da -mmcu=atmega8 -auxbase
> pr45291 -O2 -version -o pr45291.s
> GNU C (GCC) version 4.5.3 20110223 (prerelease) (avr)
>         compiled by GNU C version 4.3.2 [gcc-4_3-branch revision
> 141291], GMP version 4.3.1, MPFR version 2.4.2, MPC version 0.8.1
> [...]
> COLLECT_GCC_OPTIONS='-O2' '-S' '-mmcu=atmega8' '-dP' '-da' '-v'
> 
> ======================
> 
> In pass .148r.jump everything looks fine:
> 
> (note 2 3 6 2 NOTE_INSN_FUNCTION_BEG)
> 
> (call_insn 6 2 7 2 pr45291.c:6 (set (reg:QI 24 r24)
>         (call (mem:HI (symbol_ref:HI ("func1") [flags 0x41]
> <function_decl 0xb76a5700 func1>) [0 S2 A8])
>             (const_int 0 [0x0]))) 123 {call_value_insn} (nil)
>     (nil))
> 
> (insn 7 6 9 2 pr45291.c:6 (set (reg:QI 41 [ D.1925 ])
>         (reg:QI 24 r24)) 4 {*movqi} (nil))
> 
> (call_insn 9 7 10 2 pr45291.c:6 (set (reg:QI 24 r24)
>         (call (mem:HI (symbol_ref:HI ("func1") [flags 0x41]
> <function_decl 0xb76a5700 func1>) [0 S2 A8])
>             (const_int 0 [0x0]))) 123 {call_value_insn} (nil)
>     (nil))
> 
> (insn 10 9 11 2 pr45291.c:6 (set (reg:QI 44 [ D.1928 ])
>         (reg:QI 24 r24)) 4 {*movqi} (nil))
> 
> (insn 11 10 12 2 pr45291.c:6 (set (reg:HI 49)
>         (zero_extend:HI (reg:QI 41 [ D.1925 ]))) 94 {zero_extendqihi2}
> (nil))
> 
> (insn 12 11 13 2 pr45291.c:6 (set (reg:HI 50)
>         (ashift:HI (reg:HI 49)
>             (const_int 8 [0x8]))) 68 {ashlhi3} (nil))
> 
> (insn 13 12 14 2 pr45291.c:6 (set (reg:HI 51)
>         (zero_extend:HI (reg:QI 44 [ D.1928 ]))) 94 {zero_extendqihi2}
> (nil))
> 
> (insn 14 13 15 2 pr45291.c:6 (set (reg/v:HI 46 [ l ])
>         (plus:HI (reg:HI 50)
>             (reg:HI 51))) 22 {*addhi3} (nil))
> 
> 
> 
> 
> Then .149r.subreg1 generates insns 33 and 34 with insn 34 nullifying
> insn 33.
> 
> 
> (note 2 3 6 2 NOTE_INSN_FUNCTION_BEG)
> 
> (call_insn 6 2 7 2 pr45291.c:6 (set (reg:QI 24 r24)
>         (call (mem:HI (symbol_ref:HI ("func1") [flags 0x41]
> <function_decl 0xb76c6700 func1>) [0 S2 A8])
>             (const_int 0 [0x0]))) 123 {call_value_insn} (nil)
>     (nil))
> 
> (insn 7 6 9 2 pr45291.c:6 (set (reg:QI 41 [ D.1925 ])
>         (reg:QI 24 r24)) 4 {*movqi} (nil))
> 
> (call_insn 9 7 10 2 pr45291.c:6 (set (reg:QI 24 r24)
>         (call (mem:HI (symbol_ref:HI ("func1") [flags 0x41]
> <function_decl 0xb76c6700 func1>) [0 S2 A8])
>             (const_int 0 [0x0]))) 123 {call_value_insn} (nil)
>     (nil))
> 
> (insn 10 9 31 2 pr45291.c:6 (set (reg:QI 44 [ D.1928 ])
>         (reg:QI 24 r24)) 4 {*movqi} (nil))
> 
> (insn 31 10 32 2 pr45291.c:6 (set (reg:QI 54)
>         (reg:QI 41 [ D.1925 ])) 4 {*movqi} (nil))
> 
> (insn 32 31 33 2 pr45291.c:6 (set (reg:QI 55 [+1 ])
>         (const_int 0 [0x0])) 4 {*movqi} (nil))
> 
> (insn 33 32 34 2 pr45291.c:6 (set (subreg:QI (reg:HI 50) 1)
>         (reg:QI 54)) 4 {*movqi} (nil))
> 
> (insn 34 33 13 2 pr45291.c:6 (set (subreg:QI (reg:HI 50) 0)
>         (const_int 0 [0x0])) 4 {*movqi} (nil))
> 
> (insn 13 34 14 2 pr45291.c:6 (set (reg:HI 51)
>         (zero_extend:HI (reg:QI 44 [ D.1928 ]))) 94 {zero_extendqihi2}
> (nil))
> 
> (insn 14 13 15 2 pr45291.c:6 (set (reg/v:HI 46 [ l ])
>         (plus:HI (reg:HI 50)
>             (reg:HI 51))) 22 {*addhi3} (nil))
> 
> 
> Insn 33 survives until .188r.ira and is kicked out there. So despite
> my comment in the original bug report where I suspected avr backend to
> emit the bad subregs, it is actually a middle-end bug, right?
> 
> Target avr suffers from similar problems in 4.3, 4.4 and 4.6 which are
> all reported against avr backend, not against middleend/rtl optimizers.
insn 33 and 34 are fine.  33 sets the high part of the HImode register
to the result of the call to func1 and the low part is set to zero.
This is effectively 256 * func1.

This has been the standard way to do things in GCC since, well, forever.
 The docs seem to imply that assigning to a non-paradoxical subreg
leaves the other part undefined -- that's simply not true and has never
been true.

What would be helpful would be to post the dump after IRA but before
reload.  Unfortunately, there is no dump file for that particular
spot,so you have to use gdb to produce the dump.  Put a breakpoint at
the start of reload and emit dump.

jeff


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