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Re: MIPS: Changing the PC stored from a "and link" instruction


"Brandon H. Dwiel" <bhdwiel@ncsu.edu> writes:

> I would like to make the changes necessary so that the compiler expects the PC of the
> instruction directly after the branch to be put in the $ra register.
>
> I cannot locate where it is specified that PC+8 of an "and link" instruction is to
> be put in the $ra so that I may change it.

It's not specified in that way.  Instead, it's specified that jalr has a
delay slot.  See the uses of define_delay in gcc/config/mips/mips.md.

Ian


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