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Re: ICE in dwarf2out_frame_debug_expr() while supporting call-stack debug info


Hi,

> +rtx
> +avr_incoming_return_addr_rtx (void)
> +{
> +? /* Compute return address which is stored on the stack.
> +???? Current stack pointer at the begining of frame, before the prologue
> +???? execution holds the return address. So our job is done if we get
> +???? the stack pointer register value which inturn points to return address
> +?? */
> +? return gen_rtx_MEM (HImode, stack_pointer_rtx); }
> +
>
> This change gives me an ICE in dwarf2out_frame_debug_expr() while
> compiling libgcc2.c as the switch in MEM case is not matched (and
> therefore reaches gcc_unreachable()). Error pasted below.

(The above piece of conversation was sent by me)

I just found the reason for the ICE in dwarf2out_frame_debug_expr ().
The POST_DEC mode is not handled when a register is saved onto the
stack.  For AVR, STACK_PUSH_CODE is defined as POST_DEC.  A quick
search in all other architectures shows that only AVR uses post
decrement mode for stack push.

A possible fix can be along the lines of POST_INC with a modification
for 'offset' assignment :

static void
dwarf2out_frame_debug_expr ( rtx expr, const char * label )
{
...

+ case POST_DEC:
+   //    gcc_assert ( cfa_temp.reg == (unsigned) REGNO ( XEXP ( XEXP(
dest, 0), 0)));
+       offset =cfa_temp.offset;
+       cfa_temp.offset -=GET_MODE_SIZE (GET_MODE( dest ) );
+       break;

case POST_INC:
...
}

To avoid assertion error, I commented gcc_assert(). I can see that
POST_INC logic is based on Rule 14. Going by the comments given in the
code, my understanding of cfa_store and cfa_temp is partial and  I
would appreciate if someone can explain the requirement for assertion
as well as comment on the fix.

With the above change, I am now able to build the compiler. A quick
check of .debug_frame shows that  call-stack debug info is now
generated. Ofcourse I am to yet validate the correctness of output.

Thanks
Anitha


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