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Re: implementing load 8 byte instruction
- From: Pranav Bhandarkar <pranav dot bhandarkar at gmail dot com>
- To: roy rosen <roy dot 1rosen at gmail dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: Fri, 19 Mar 2010 17:52:54 -0500
- Subject: Re: implementing load 8 byte instruction
- References: <bba479b11003180829v331ef9d4x61a4c78212618deb@mail.gmail.com>
On Thu, Mar 18, 2010 at 10:29 AM, roy rosen <roy.1rosen@gmail.com> wrote:
> Hi,
>
> I am trying to implement a simple load 8 bytes instruction.
> I tried to use movdi so that it would allocate two sequential
> registers for the load.
> It starts well but in pass subreg1 the insns are decomposed and all DI
> operands are replaced with SI.
>
> I understand that this is a desireable optimzation but then the load
> is done using two load 4 bytes instructions.
>
> Does anybody has any idea what should I do?
Could it be a problem with the constraints in your movdi define_insn ?
Pranav