Coloring problem - Pass 0 for finding allocno costs

[Frank Isamov <frank dot isamov at gmail dot com>]

Hi,

In my backend, I have a problem with the pass which determines the
best register class for a virtual register (Pass 0 for finding allocno
costs).

In all insns in this example both R_REGS and D_REGS register classes
are applicable (but all registers in an insn should be from the same
register class).

This is asmcons output:

;; Function mul (mul)
(note 1 0 5 NOTE_INSN_DELETED)

(note 5 1 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)

(note 2 5 3 2 NOTE_INSN_DELETED)

(insn 3 2 4 2 a.c:2 (set (reg/v:SI 97 [ b ])
        (reg:SI 49 r1 [ b ])) 43 {movsi_regs} (expr_list:REG_DEAD
(reg:SI 49 r1 [ b ])
        (nil)))

(note 4 3 7 2 NOTE_INSN_FUNCTION_BEG)

(insn 7 4 9 2 a.c:5 (set (reg/v:SI 94 [ __a_11 ])
        (plus:SI (reg:SI 48 r0 [ a ])
            (reg/v:SI 97 [ b ]))) 0 {*addsi3_1} (expr_list:REG_DEAD
(reg:SI 48 r0 [ a ])
        (nil)))

(insn 9 7 10 2 a.c:5 (parallel [
            (set (reg:SI 100)
                (ashift:SI (reg/v:SI 97 [ b ])
                    (const_int 3 [0x3])))
            (clobber (reg:CC 88 cc))
        ]) 36 {ashlsi3} (expr_list:REG_UNUSED (reg:CC 88 cc)
        (expr_list:REG_EQUAL (ashift:SI (reg/v:SI 97 [ b ])
                (const_int 3 [0x3]))
            (nil))))

(insn 10 9 11 2 a.c:5 (set (reg:SI 101)
        (plus:SI (reg:SI 100)
            (reg/v:SI 97 [ b ]))) 0 {*addsi3_1} (expr_list:REG_DEAD (reg:SI 100)
        (expr_list:REG_DEAD (reg/v:SI 97 [ b ])
            (expr_list:REG_EQUAL (mult:SI (reg/v:SI 97 [ b ])
                    (const_int 9 [0x9]))
                (nil)))))

(insn 11 10 12 2 a.c:5 (set (reg:SI 102)
        (plus:SI (reg:SI 101)
            (reg/v:SI 94 [ __a_11 ]))) 0 {*addsi3_1}
(expr_list:REG_DEAD (reg:SI 101)
        (expr_list:REG_DEAD (reg/v:SI 94 [ __a_11 ])
            (nil))))

(note 12 11 17 2 NOTE_INSN_DELETED)

(insn 17 12 23 2 a.c:7 (parallel [
            (set (reg/i:SI 48 r0)
                (ashift:SI (reg:SI 102)
                    (const_int 10 [0xa])))
            (clobber (reg:CC 88 cc))
        ]) 36 {ashlsi3} (expr_list:REG_UNUSED (reg:CC 88 cc)
        (expr_list:REG_DEAD (reg:SI 102)
            (nil))))

(insn 23 17 0 2 a.c:7 (use (reg/i:SI 48 r0)) -1 (nil))

The problem I see is that for registers 100,101 I get best register
class D instead of R – actually they get the same cost and D is chosen
(maybe because it is first).

But they should not get the same cost since choosing D_REGS causes two
additional copies.

To my understanding the algorithm checks every insn, and since
register 100 appears only in insns in which all registers are still
virtual, any register class fits without additional cost. But later
when coloring it with d register, we need copies from r to d and back
to r.

Can someone please help with this?

Is there any reading material about this part of the IRA?

Thanks, Frank.