Problem initializing volatile structures

[Byron Stanoszek <bstanoszek at comtime dot com>]

I've recently upgraded to GCC 4.3.2 from 4.2.2, and I noticed a strange
change in how volatile bitmask structures are optimized.

Consider the following code:

/* 32-bit MMIO */
struct hardware {
  int parm1:8;
  int :4;
  int parm2:4;
  int parm3:15;
  int parm4:1;
};

void f1()
{
  volatile struct hardware *ptr=(void *)0x11223344;

  *ptr=(struct hardware) {
    .parm1=42,
    .parm2=13,
    .parm3=11850,
    .parm4=1,
  };
}

void f2()
{
  volatile struct hardware *ptr=(void *)0x11223344;

  struct hardware set={
    .parm1=42,
    .parm2=13,
    .parm3=11850,
    .parm4=1,
  };

  *ptr=set;
}


In GCC 4.3.2, this produces the following assembly:

f1:
        movl    $0, 287454020
        movb    $42, 287454020
        movl    287454020, %eax
        andb    $15, %ah
        orb     $208, %ah
        movl    %eax, 287454020
        movl    287454020, %eax
        andl    $-2147418113, %eax
        orl     $776601600, %eax
        movl    %eax, 287454020
        movl    287454020, %eax
        orl     $-2147483648, %eax
        movl    %eax, 287454020
        ret

f2:
        movl    $-1370828758, 287454020
        ret

Aren't both functions syntactically the same, and shouldn't they produce the
same optimized code as in "f2" above? This used to be the case in GCC 4.2.2.

The problem I'm seeing, apart from the lack of optimization, is that "f1"
causes 5 separate writes to a single MMIO register, instead of 1. This
particular hardware register is only expecting one write to this location, and
when multiple writes are received it causes the hardware to fail.

If this new behavior is intended, is there some sort of attribute I can add to
the code to get the original 4.2.2 behavior back?

Thanks for your comments,
 -Byron