This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: generate RTL sequence
daniel tian <daniel.xntian@gmail.com> writes:
> 2009/12/11 Ian Lance Taylor <iant@google.com>:
>> daniel tian <daniel.xntian@gmail.com> writes:
>>
>>> Â Â I have a problem about RTL sequence.
>>> Â Â If I wanna generate the RTL in sequence, and don't let gcc to schedule them.
>>> Â Â Like the following(all the variable is rtx):
>>>
>>> Â Â emit_insn(reg0, Âoperands[0]);
>>> Â Â emit_insn(reg1, Âreg0);
>>> Â Â emit_insn(operands[0], Âreg1);
>>>
>>> Â Â But gcc will will reorder the three rtl in optimization.
>>> Â Â I just wanna the those rtl in one block as a unit, don't let the
>>> gcc disrupt the sequence.
>>> Â Â How can I do it?
>>
>> Write a single define_insn which emits the instructions you want to
>> treat as a unit.
>>
>
> Does there any solution in RTL level?
> Because I already solve the problem in ASM output level, exactly the
> same solution as you suggest in this email.
> I may need do some optimization later. So RTL level will be great!
As far as I know there is no way to do this at the RTL level. I don't
know why there would be a way, as it does not strike me as a useful
feature to have. If the instructions must stay together at the
assembly level, use a single define_insn. If you use multiple
define_insns, then it's OK for the compiler to move them around.
Ian