Re: How to support 40bit GP register

[Dave Korn <dave dot korn dot cygwin at googlemail dot com>]

Mohamed Shafi wrote:

> Load-store uses 32bits. Sign extension happens automatically. So i
> have choosen INT_MODE (RI, 5) and copied movsi and renamed it to
> movri. I have also specified that RImode need only one register.

> I get the following ICE
> 
> internal compiler error: in immed_double_const, at emit-rtl.c:553
> 
> This happens from cse_insn () calls insert() -> gen_lowpart ->
> gen_lowpart_common -> simplify_gen_subreg -> simplfy_immed_subreg.
> simplify_immed_subreg is called with the parameters (outermode=RImode,
> (const_int 65535), innermode=DImode, byte=0)
> 
> cse_insn is called for the following insn
> 
> (insn 10 9 11 3 bug7.c:14 (set (reg:RI 67)
>         (const_int 65535 [0xffff])) 4 {movri} (nil))
> 
> 
> How can i overcome this?

  Just from reading the source for immed_double_const, I see:

>   /* There are the following cases (note that there are no modes with
>      HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):

  Oops.  That's no longer true if HBPWI == 32 and your new mode has 40 bits.

>       gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);

  I would guess that assert is firing.

>   /* If this integer fits in one word, return a CONST_INT.  */
  if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
    return GEN_INT (i0);

  Here you'll want to mask out and check only the low 8 (== 40 - 32, i.e.
GET_MODE_BITSIZE(mode) - HOST_BITS_PER_WIDE_INT) bits of i1, I think.  The
rest of the code looks like it should work.

    cheers,
      DaveK