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Re: Inline assembly operand specification
- From: Ian Lance Taylor <iant at google dot com>
- To: ZoltÃn KÃcsi <zoltan at bendor dot com dot au>
- Cc: gcc at gcc dot gnu dot org
- Date: Mon, 05 Oct 2009 09:53:57 -0700
- Subject: Re: Inline assembly operand specification
- References: <20091003093336.36784917@manocska.bendor.com.au>
ZoltÃn KÃcsi <zoltan@bendor.com.au> writes:
> Is there a documentation of the various magic letters that you can
> apply to an operand in inline assembly?
Unfortunately, no.
> The
> only place I found some information was going through the
> gcc/config/<chip>/<chip>.c file and trying to find the meaning of such
> letters in the xxx_print_operand() function.
Right, that is the only current documentation there is.
> If that is the correct
> approach, then I think there's a problem with the arm-elf (I know it is
> dead, but still).
>
> According to the comments in that function, for DI and DF arguments the
> Q and R qualifiers supposed to select the least significant and most
> significant 32 bits, respectively, of the 64-bit datum. Indeed that's
> what they do, for a long long. However, for a double they don't seem to
> take into account that on arm-elf the word order of a double is always
> big-endian, regardless of the endianness of the rest. Therefore, they
> select the wrong half of the datum. On arm-eabi, where the endianness
> of doubles matches the rest, they work fine.
For a value which is always big-endian you don't need any modifier for
the low register, and you can use %H for the high register.
Ian