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Re: Lattice Mico32 port

On 09/28/2009 03:51 PM, Jon Beniston wrote: 
(define_insn "*ashlsi3_const"
    [(set (match_operand:SI 0 "register_operand" "=R1")
          (ashift:SI (match_operand:SI 1 "register_operand" "0")
                     (match_operand:SI 2 "const_5bit_operand" "i")))
     (clobber (match_scratch:SI 3 "=RA"))]
    "!TARGET_BARREL_SHIFT_ENABLED"
    "calli	__ashlsi3_%2"
    [(set_attr "type" "call")])

As I kept on getting "unable to find a register to spill in class R1" and
wasn't sure how to fix it. As you say, this is something that can be added
later. I've also fixed a few other issues that have cropped up during
testing.

We can have a look at this again once your port is committed.

Worse come to worse, we could add more such functions which operate on more registers (perhaps 4?). E.g. __ashlsi3_R_N where R is the register number to operate on, and N is the number of bits to shift. Then you'd need to measure to see what kind of size vs speed impact this has for the kind of applications you are targeting.

Oh, we'd probably have to be sure to make all of these functions hidden, so that you don't wind up going through the dynamic linker.


r~

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