Modelling of multiple condition code registers

[Markus L <markusl dot se78 at gmail dot com>]

Hi,

I have a question about modelling of condition codes in GCC. The
target I am considering has the following characteristics:

Associated with each register is a set of CC flags that are updated
whenever that register is used as a destination of an operation that
would normally update the CC register in a single CC machine. Example:

add r0, r1, r2? // updates r2's condition codes
cmp r0, r1 // updates r1's condition codes

Any instruction can be predicated on these condition codes, e.g.

if (r2:ge) ld [r0], r1
if(r1:ne) mpy r1, r2, r3

So we have several CC registers and the one that will be updated for a
given instruction directly depends on the destination register chosen
for that instruction.

My question is; would it be possible for GCC take advantage of these
"extra" CC registers? And if that should be the case how would I go
about modelling it?

BR
/Markus