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Re: Register Pressure in Instruction Level Parallelism
- From: Jeff Law <law at redhat dot com>
- To: Vladimir Makarov <vmakarov at redhat dot com>
- Cc: reply at meinersbur dot de, gcc at gcc dot gnu dot org
- Date: Wed, 01 Jul 2009 00:06:31 -0600
- Subject: Re: Register Pressure in Instruction Level Parallelism
- References: <4A47462E.1080402@uni-paderborn.de> <4A48EB07.3040602@redhat.com>
Vladimir Makarov wrote:
So, now my questions: How much do you think could this could improve
compiled code speed? Would the current GCC/YARA benefit from such an
optimization pass at all?
I think nobody can answer the questions until it is implemented.
Agreed.
If you are going to work on this project, some small advice about
evaluating register sufficiency. I found that register pressure is
already practically minimized before insn-scheduling (I suspect that
it is mostly done in TER).
I was rather surprised to stumble upon this myself -- I find myself
regularly looking functions where we spilled and couldn't see any way to
avoid spilling without some kind of range splitting objects in
non-obvious ways.
The one case I did see where we regularly spilled that could be avoided
was excessively long ranges created by loading incoming arguments into
pseudos. I haven't bothered to look into ways to improve that situation.
Jeff