Re: Register Pressure in Instruction Level Parallelism

[Albert Cohen <Albert dot Cohen at inria dot fr>]

Dave Korn wrote:
> (...)

I fully agree with your arguments. Managing register pressure early, and 
simplifying downstream passes (to avoid poluting them with pressure 
concerns) is a very tempting design. Yet from dream to reality there is 
a long way.

>   :) I'm not up on advanced compiler theory, I'll have to sit back at this
> point and leave it to the collective genii to get on with!  (I'll just suggest
> that one advantage of implementing things in GCC is that it runs in such a
> huge range of environments and targets, it's a good way to expose any new
> algorithm to "interesting" problems caused by quirky architectures.)

Exactly. Much register allocation and scheduling work is completely 
useless for a retargettable compilers for real architectures due to the 
lack of realistic constraint modeling. Of course, there are many other 
reasons that make academic research results useless, this is just one 
possible way to miss the point...

Register saturation is a very powerful concept that remains to be 
extended to real conditions and beyond the interplay of allocation and 
scheduling.

Albert