Re: Register Pressure in Instruction Level Parallelism

[Dave Korn <dave dot korn dot cygwin at googlemail dot com>]

Michael Kruse wrote:

> So, now my questions: How much do you think could this could improve
> compiled code speed? Would the current GCC/YARA benefit from such an
> optimization pass at all? What are the chances that this could get into
> the main GCC tree if it shows up to be an improvement?

  One of the major problems in gcc is the intertangling of instruction
selection with register allocation and spill generation.  If these could be
separated it would almost certainly generate better code and be welcomed with
open arms!

> I'd prefer to implement this for the gcc, but my advisor wants me to do
> it for the university's own compiler. Therefore I could also need
> arguments why to do it for the GCC.

  Because destroying reload(*) would be an incalculable public service and
your name will be remembered in history as the one who slew the dragon? ;-)

    cheers,
      DaveK
-- 
(*) - http://gcc.gnu.org/wiki/reload