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Re: Address mode offset spill
daniel tian <daniel.xntian@gmail.com> writes:
> There is a problem I encountered. I port gcc to 32bit RISC. The
> LOAD/STORE only has 8bit displacement. If the immediate displacement
> larger than 256, the displacement must be force into register. In
> addition, if the immediate is larger than 512, it can only move into
> one specified register R0.
>
> Like:
>
> LW R2 (R1) #252 ;; means R2 = Mem(R1 + 255)
>
> LW R2 (R1) #508;; it is wrong. immediate 508 should force into
> register first.
>
>
> LW R2 (R1) #0x500;; it is wrong, immediate 0x500 should force into
> register R0 first.
>
> Now, for immediate movement, it is achieved to move large immediate.
> But I don't know how to make the address mode legitimate. Now I try to
> add the code in LEGITIMIZE_RELOAD_ADDRESS like sh.md, or arm.md. But
> cc1 still crashed, when the frame size is larger than 255. Do I miss
> something?
I would fix this in LEGITIMIZE_RELOAD_ADDRESS or in
TARGET_SECONDARY_RELOAD. I don't know why cc1 crashed, you will have to
debug that.
Ian