This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: Setting ARM PIC register (Was: RE: GCC 4.5.0 Status Report (2009-05-05))
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Joern Rennecke <amylaar at spamcop dot net>
- Cc: Michael Matz <matz at suse dot de>, Ramana Radhakrishnan <ramana dot radhakrishnan at arm dot com>, "'Mark Mitchell'" <mark at codesourcery dot com>, gcc at gcc dot gnu dot org
- Date: Wed, 06 May 2009 17:05:23 +0100
- Subject: Re: Setting ARM PIC register (Was: RE: GCC 4.5.0 Status Report (2009-05-05))
- References: <20090506120348.gz1inz2zkk088ckw-nzlynne@webmail.spamcop.net>
On Wed, 2009-05-06 at 12:03 -0400, Joern Rennecke wrote:
> Michael Matz wrote:
> >> The easiest solution would be to just make a note that you need the
> >> PIC register and then, when expanding the prologue emit the
> >> necessary instructions. IMO that makes sense as PIC register setup
> >> usually is something the prologue does, like all the other register
> >> setups necessary.
>
> Richard Earnshaw:
> > That won't work because the PIC register on ARM is a pseudo, so
> > generating it during prologue generation is too late. It needs to exist
> > before data flow analysis starts on the RTL.
>
> How about emitting a set at each place the PIC register is needed,
> and making sure that gcse will will common these sets where
> appropriate?
I'd rather not. -O0 code is bad enough already; and this just makes
more work for the compiler.
R.