This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: help for arm avr bfin cris frv h8300 m68k mcore mmix pdp11 rs6000 sh vax
On Fri, Mar 13, 2009 at 6:06 PM, Paolo Bonzini <bonzini@gnu.org> wrote:
>
> So, I'd still need the information for arm and m68k, because that
> information is about the bitfield instructions.
For ARM, shifts by immediate use a 5-bit constant, shifts by register
use the lower 8 bits of the register.
For ARMv6T2/ARMv7, bitfield instructions:
- BFC, BFI specify an immediate 5-bit starting bit position and
an immediate 5-bit ending bit position
- SBFX, UBFX specify an immediate 5-bit starting bit position
and an immediate 5-bit width.
Laurent