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Re: help for arm avr bfin cris frv h8300 m68k mcore mmix pdp11 rs6000 sh vax
- From: Hans-Peter Nilsson <hans-peter dot nilsson at axis dot com>
- To: bonzini at gnu dot org
- Cc: gcc at gcc dot gnu dot org, richard dot earnshaw at arm dot com, bernd dot schmidt at analog dot com, hans-peter dot nilsson at axis dot com, aldyh at redhat dot com, aoliva at redhat dot com, law at redhat dot com, nickc at redhat dot com, kazu at codesourcery dot com, ni1d at arrl dot net, kkojima at gcc dot gnu dot org, matt at 3am-software dot com
- Date: Fri, 13 Mar 2009 19:41:26 +0100
- Subject: Re: help for arm avr bfin cris frv h8300 m68k mcore mmix pdp11 rs6000 sh vax
> Date: Fri, 13 Mar 2009 12:34:49 +0100
> From: Paolo Bonzini <bonzini@gnu.org>
> I would like to know whether for avr,bfin,cris,frv,h8300,pdp11,rs6000
> (which define SHIFT_COUNT_TRUNCATED as 0) and for mcore,sh,vax (which
> do not define it at all) it is right that shift counts are never
> truncated.
The answer to the question is "no", but I'd guess the more
useful answer is "yes", for different definitions of "truncate".
For CRIS, shift counts (variable; literate ones are 5 bits) are
truncated to 6 (six) bits, regardless of the mode of the shift
result (NB, all standard-named shifts are define_expanded to
SImode, though anon strict_low_part-matching patterns for other
modes exist). See also
<http://www.axis.com/files/manuals/etrax_fs_des_ref-070821.pdf>,
<http://www.axis.com/files/tech_notes/etrax_100lx_prog_man-050519.pdf>
and src/cpu/cris.cpu.
So, if the result of the truncation has bit 5 set for SImode,
the results is 0. For smaller modes, a size larger than the
number of bits of the mode yields the extended result in those
bits (i.e. all 1 or 0, depending on the operation).
brgds, H-P