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Re: help for arm avr bfin cris frv h8300 m68k mcore mmix pdp11 rs6000 sh vax
Paolo Bonzini <bonzini@gnu.org> wrote:
> So you have that in the RTL stream we should canonicalize "a << 32" to
> "a", but "a << (b & 31)" is not the same as "a << b"?
Yes when the msb of b is set.
> Also, how is the sign bit is significant? Does it determine whether the
> value is left- or right-shifted?
Yep. SH3 uses SHLD (SHift Logical Dynamically) insn which
is modeled like as:
SHLD (Rm, Rn)
{
int sign = Rm & 0x80000000;
if (sign == 0)
Rn <<= (Rm & 0x1f);
else if ((Rm & 0x1f) == 0)
Rn = 0;
else
Rn = (unsigned)Rn >> ((~Rm & 0x1f)+1);
}
> Finally, is SH2A the same as SH3?
Although SH2A has a new arithmetic shift instruction, it's
same as SH3 in this regard, I think.
Regards,
kaz