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Re: Constant folding and Constant propagation
- From: Joern Rennecke <amylaar at spamcop dot net>
- To: gcc at gcc dot gnu dot org
- Cc: Paul Brook <paul at codesourcery dot com>, Ian Lance Taylor <iant at google dot com>, Jean Christophe Beyler <jean dot christophe dot beyler at gmail dot com>
- Date: Tue, 10 Feb 2009 00:17:48 -0500
- Subject: Re: Constant folding and Constant propagation
Ian Lance Taylor:
that you are looking for. I'm not aware of any other processor which is
able to load a large constant in a single instruction, but for which an
add instruction is cheaper if there is a similar constant already
available.
Paul Brook:
This is true for Arm/Thumb. You have limited immediate values for
[cheap] ALU instructions (mov/add), but can also load arbitrary
constants from a pool with a single [relatively expensive]
pc-relative load. We lie about what immediate we can load, then fix
this up in md-reorg.
The SH also uses md-reorg to load constants from memory.
And the ARCompact allows 32-bit constants, but that requires an extra
fetch cycle; cheap 12 bit signed constants are allowed for two-address
ALU operations, and 6 bit unsigned for three-address ALU operations.
OTOH if you want to store a zero, you either have to load it into a register,
or use a (costly) 32 bit constant. And there can only be one 32-bit cosntant
per instruction, i.e. you can store a 32 bit immediate to a register + offset
address, or store a register to a 32 bit immediate adddress, but not a 32 bit
immediate constant to an absolute address.