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RE: [IRA] New register allocator question
- From: "Bingfeng Mei" <bmei at broadcom dot com>
- To: "Bingfeng Mei" <bmei at broadcom dot com>, "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Cc: "Vladimir Makarov" <vmakarov at redhat dot com>
- Date: Fri, 2 Jan 2009 06:34:18 -0800
- Subject: RE: [IRA] New register allocator question
- References: <7FB04A5C213E9943A72EE127DB74F0AD24F97C2F83@SJEXCHCCR02.corp.ad.broadcom.com>
I found if I define a new register class that covers both GR_REGS and PR_REGS, the issue can be solved. New IRA spill the predicate register to general regsister first instead of memory. Is this right approach?
#define IRA_COVER_CLASSES \
{ \
GRPR_REGS, M_REGS, BXBC_REGS, LIM_REG_CLASSES \
}
> -----Original Message-----
> From: gcc-owner@gcc.gnu.org [mailto:gcc-owner@gcc.gnu.org] On
> Behalf Of Bingfeng Mei
> Sent: 02 January 2009 11:50
> To: gcc@gcc.gnu.org
> Cc: Vladimir Makarov
> Subject: [IRA] New register allocator question
>
> Hello,
> I recently ported our GCC to new IRA by following mainline
> development. The only interface I added is
> IRA_COVER_CLASSES. Our architecture has predicate register
> file. When predicate register has to be spilled, the new IRA
> produces inferior code to the old register allocator. The
> old allocator first tries to spill to general register file,
> which is far cheaper on our architecture than spilling to
> memory. The IRA always spills the predicate register to
> memory directly.
>
> #define IRA_COVER_CLASSES \
> { \
> GR_REGS, PR_REGS, M_REGS, BXBC_REGS, LIM_REG_CLASSES \
> }
>
> Apart from above macro, what other interfaces/parameters I
> can tune to change this behaviour in new IRA? Thanks in advance.
>
> Happy New Year,
> Bingfeng Mei
>
> Broadcom UK.
>
>
>