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Re: [ARM] Implement __builtin_bswap32() via ARMv6 "rev" instruction




Sent from my iPhone

On Dec 8, 2008, at 9:37 AM, "Alexandre Pereira Nunes" <alexandre.nunes@gmail.com > wrote:

2008/12/8 Paul Brook <paul@codesourcery.com>:
On Monday 08 December 2008, Alexandre Pereira Nunes wrote:
A patch follows. I didn't take care of the scheduling case the correct
way, tought (aliased to clz class).

Please read http://gcc.gnu.org/contribute.html


In particular you need a copyright assignment, ChangeLog entry, and testing.


I can provide these, tough as for the copyright assignment, the document mentions I can declare the changes in public domain, and since I already published something (which may or may not be used by someone in the future), I hereby do so.

You should also be able to implement bswap16, and while we're here it probably
makes sense to implement an optimized bswap sequence for pre-v6 cores.



Arm has rev constructs for 16 bit packed integers, however AFAIK gcc
has no builtin for these yet, and without this, it won't internally
have any use for this instruction pattern, correct? I only saw
mentions to bswap32 and bswap64 on the documentation.

That is because bswap16 is the same as a rotate in 16bit mode by 8.


Thanks,
Andrew Pinski



I'll take a look on the optimized bswap32 sequences for previous cores
and get these expanded when not optimizing for size, IIRC I saw
similar patterns on some other architecture machine description.


Once all that is fixed, patches should be sent to gcc-patches@gcc.gnu.org , not
this list.



Roger that; Thanks.


-- Alexandre


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