Re: How to write pattern for addition with carry operation

["Uros Bizjak" <ubizjak at gmail dot com>]

On Sat, Jun 7, 2008 at 11:18 AM, Mohamed Shafi <shafitvm@gmail.com> wrote:

>>> The 16bit target that i am porting to gcc4.1.2 doesn't have any
>>> instructions for 32bit operations. But for addition and subtraction
>>> there is
>>> addc
>>> subc
>>> instructions that consider carry bit also. Presently i have patterns
>>> for SImode addition and subtraction such that the template will have
>>>
>>> add %0, %1\naddc %N0, %N1
>>> sub %0, %1\nsubc %N0, %N1
>>>
>>> Will it be possible for me to write separate patterns for the
>>> instructions add and addc?
>>>
>>
>> You can look into config/i386.md, how i.e. adddi3 is expanded and split in
>> case of !TARGET_64BIT.
>
> But is it scheduling safe?
> I mean you can't have addc executed before add. If i am right there
> will be no dependency between the two instructions. So there can be a
> case where addc gets scheduled before add. Am i right on both counts?

No, they are connected through carry flag in the sense that "add" is
the producer "and addc" is the consumer of CC reg, At least this is
the way i386 pattern works for a couple of decades without problems.

Uros.