This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: gcc-4.3.0/ppc32 inline assembly produces bad code


Daniel Jacobowitz <drow@false.org> writes:

> On Wed, Mar 26, 2008 at 09:25:05AM -0700, Till Straumann wrote:
>> Is my inline assembly wrong or is this a gcc bug ?
>
> Your inline assembly seems wrong.

I don't think so.

>> /* Powerpc I/O barrier instruction */
>> #define EIEIO(pmem) do { asm volatile("eieio":"=m"(*pmem):"m"(*pmem)); }  
>> while (0)
>
> An output memory doesn't mean what you think.

IMHO the usage here is perfectly correct.

> I suspect GCC gave you an input memory operand as "%r0(%r9)" and an
> output memory operand as "%r9", and expected the asm to do what it
> said it would do with its operands.

The actual operands are 16(%r3) and 16(%r9).  But the asm statement
correctly declares to only write to memory, and is not supposed to
change %r9 in any way.

Andreas.

-- 
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
PGP key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]