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RE: ARM gcc generates incorrect code?


On 27 February 2008 11:48, Krzysztof Halasa wrote:

> Hi,
> 
> not sure where the bug is - gcc 4.2.4pre (CVS), binutils 2.17,
> cross compiler X86_64 -> ARM BE.

  That asm looks a bit odd to me (but I haven't had much coffee today so I
could be reading it wrong):-

> #define get_user(x,p)							\
> 	({								\
> 		register const u8 __user *__p asm("r0") = (p);		\
> 		register unsigned long __r2 asm("r2");			\
> 		register int __e asm("r0");				\
> 		__asm__ __volatile__ (					\
> 			__asmeq("%0", "r0") __asmeq("%1", "r2")		\
> 			"bl	__get_user_1"				\
> 			: "=&r" (__e), "=r" (__r2)			\
                    ^^^^^ '&' means output operand (zero)
                          is early-clobber, so cannot share
                          a register with any input operand.

> 			: "0" (__p)					\
                    ^^^^^^ '0' means forcibly share an input 
                           operand with operand zero.

> 			: "lr", "cc");					\
> 		x = (u8) __r2;						\
> 		__e;							\
> 	})

  That's quite likely to do reload's head in, isn't it?

> Gcc bug? get_user() bug? Should I file a bug entry?

  I think the macro could well be wrong.  Do you know why those constraints
were chosen?


    cheers,
      DaveK
-- 
Can't think of a witty .sigline today....


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