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Re: Redundant logical operations left after early splitting
Paolo,
As you suggested, I moved the extra fwprop nearer combine, just after
split - but it failed to propagate anything.
The reason is that immediately post split the data flow is reflecting
cross dependencies between Word and subreg U/D. So the USE of just 1
QImode subreg of SImode register islinked to 4 QImode DEFs - and fwprop
gives up.
Putting fwprop after subreg pass removes this problem - as the subreg
have then been converted to QImode psuedo regs and we get single DEF.
Andy
Paolo Bonzini wrote:
This would indicate that simplify-rtx inside fwprop is removing OR Rx,0
but not picking up the the additionally revealed forward propagation
oppertunities
This would seem to be an avoidable limitation.
Yes, can you send me your MD patch and a simple testcase? fwprop is
supposed to be "cascading", and some bugs in cascading were already
revealed by the AVR port.
It might be even more worthwhile to try *moving* fwprop2 after
combine, then.
Paolo