This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Stack based / zero operand CPU - ZPU
- From: "Øyvind Harboe" <oyvind dot harboe at zylin dot com>
- To: gcc at gcc dot gnu dot org
- Date: Mon, 14 Jan 2008 10:58:16 +0100
- Subject: Stack based / zero operand CPU - ZPU
Hi all,
I've implemented a stack based or zero operand CPU, including GCC/gdb toolchain,
eCos operating system support, simulator, HDL implementation, etc.
I'm boldly assuming that a fair number of people on this list might
find this a little
bit fascinating.
It's all open source of course:
http://www.opencores.org/projects.cgi/web/zpu/overview
- the ZPU has 11 instructions, the rest is implemented using microcode(yields
small CPU + small code size).
- the only registers are SP and PC
- 16 or 32 bit datapath
- GCC is very much oriented towards all sorts of register based CPU's. I settled
on exposing stack slots as CPU registers + some other tricks. GCC generates
very decent code(80% of codesize to ARM thumb).
- Cygwin binaries + GCC source code available(of course)
- ++
--
Øyvind Harboe
http://www.zylin.com - eCos ARM & FPGA developer kit