This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: How to describe a FMAC insn
- From: kenner at vlsi1 dot ultra dot nyu dot edu (Richard Kenner)
- To: dragonylffly at gmail dot com
- Cc: gcc at gcc dot gnu dot org
- Date: Wed, 26 Dec 2007 08:12:31 EST
- Subject: Re: How to describe a FMAC insn
- References: <4771EDE8.9030709@gmail.com>
> Could someone give some hints of how to describe a FMAC (float mult and
> add) insn in machine description, it matches d = b*c+a, which is a four
> operands float instrution. With a glimp through the array optabs[] in
> genopinit.c, it seems no OP handler could match FMAC operation?
Correct. It isn't generated directly during RTL generation, but instead
created by the optimizer (combine) from add and multiply insns.