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Re: Function specific optimizations call for discussion
On Thu, Nov 29, 2007 at 02:25:46PM +0530, Ramana Radhakrishnan wrote:
> Hi,
>
> Hit the send button a bit too soon on my earlier mail .
>
>
>
> > In the x86 world this would mean saying that an individual function can use
> > SSE5 instructions or SSE4.1 instructions. This would simplify things for
> > people who need to write high performance libraries that run on different
> > architectures, and need to be optimal on each platform. Ultimately, the goal
> > is to allow hotspot functions to be compiled several times with different
> > target specific optimizations. I would welcome any thoughts or suggestions
> > about this proposal.
>
> I noticed this from your proposal.
>
> Stage1: Teach the inliner about target specific functions
>
> We will teach the inliner not to inline functions compiled with target
> specific optimizations inside of a general function. However, if a
> function that has target specific optimizations it should be able to
> inline normal functions, or functions compiled with the same set of
> target specific optimizations. I estimate that this should take 2
> weeks of time.
>
>
>
> This is already handled in the inliner and could be handled by
> defining the target hook TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P .We use
> it in the private port that we maintain to disable inlining of certain
> attributed functions like interrupt handlers. The way we do it already
> is to look at DECL_ATTRIBUTES of the tree to figure this out. You
> would have to munge in the attributes into the DECL_ATTRIBUTES and the
> check later when you do the same but I guess you know that already.
Yes, though some of the work will be gluing the pieces together. I haven't
looked at the inliner in detail right now.
--
Michael Meissner, AMD
90 Central Street, MS 83-29, Boxborough, MA, 01719, USA
michael.meissner@amd.com