This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR


On Nov 13, 2007 3:00 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
>
> On Tue, Nov 13, 2007 at 02:14:58PM +0100, Franck Bui-Huu wrote:
>
> > > > David Daney writes:
> > > >  > With the current kernel (2.6.23.1) in my R5000 based O2 it seems
> > > >  > impossible for GCC's exception unwinding machinery to unwind through
> > > >  > signal frames.  The cause of the problems is the
> > > >  > ICACHE_REFILLS_WORKAROUND_WAR which puts the sigcontext at an almost
> > > >  > impossible to determine offset from the signal return trampoline.  The
> > > >  > unwinder depends on being able to find the sigcontext given a known
> > > >  > location of the trampoline.
> > > >  >
> > > >  > It seems there are a couple of possible solutions:
> > > >  >
> > > >  > 1) The comments in war.h indicate the problem only exists in R7000
> > > >  > and E9000 processors.  We could turn off the workaround if the
> > > >  > kernel is configured for R5000.  That would help me, but not those
> > > >  > with the effected systems.
> > > >  >
> > > >  > 2) In the non-workaround case, the siginfo immediately follows the
> > > >  > trampoline and the first member is the signal number.  For the
> > > >  > workaround case the first word following the trampoline is zero.
> > > >  > We could replace this with the offset to the sigcontext which is
> > > >  > always a small negative value.  The unwinder could then distinguish
> > > >  > the two cases (signal numbers are positive and the offset
> > > >  > negative).  If we did this, the change would have to be coordinated
> > > >  > with GCC's unwinder (in libgcc_s.so.1).
> > > >  >
> > > >  > Thoughts?
> > > >
> > > > The best solution is to put the unwinder info in the kernel.  Does
> > > > MIPS use a vDSO ?
> > >
> > > No though we should.
> > >
> > > Another reason is to get rid of the classic trampoline the kernel installs
> > > on the stack.  On some multiprocessor systems it requires a cacheflush
> > > operation to be performed on all processors which is expensive.  Having
> > > the trampoline in a vDSO would solve that.
> > >
> >
> > And the stack wouldn't need to have exec permission anymore.
>
> Oh?
>
> extern void frob(void (*)(void));
>
> int foo(void)
> {
>         int x;
>
>         void bar(void)
>         {
>                 x++;
>         }
>
>         frob(&bar);
>         print("x is %d\n", x);
> }
>
> Compile and enjoy.
>

Sorry Ralf, I missed your point.

-- 
               Franck


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]