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Re: Tree-SSA and POST_INC address mode inompatible in GCC4?
- From: Paul Brook <paul at codesourcery dot com>
- To: gcc at gcc dot gnu dot org
- Cc: Mark Mitchell <mark at codesourcery dot com>, Kenneth dot Zadeck at naturalbridge dot com, zadeck at naturalbridge dot com, rakdver at atrey dot karlin dot mff dot cuni dot cz, dnovillo at google dot com
- Date: Mon, 5 Nov 2007 19:14:21 +0000
- Subject: Re: Tree-SSA and POST_INC address mode inompatible in GCC4?
- References: <87fxzna11s.fsf@numenor.site> <472E5A71.9080300@codesourcery.com>
On Sunday 04 November 2007, Mark Mitchell wrote:
> Kenneth Zadeck wrote:
> > To fix this will require a round of copy propagation, most likely in
> > concert with some induction variable detection, since the most
> > profitable place for this will be in loops.
>
> For code size, it will be profitable everywhere. On ARM
Not technically true. On Thumb-2 we have variable length instruction encoding.
For small offsets (< 16bytes IIRC) a pair of post increment loads is larger
than a pair of offset loads and an add.
However using postincrement everywhere is a good start (probably better than
what we have) and I'd guess is a prerequisite for adding more advanced cost
heuristics.
Paul