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Re: Optimization of conditional access to globals: thread-unsafe?
On Monday 22 October 2007, Robert Dewar wrote:
> Erik Trulsson wrote:
> > It is also worth noting that just declaring a variable 'volatile' does
> > not help all that much in making it safer to use in a threded environment
> > if you have multiple CPUs. (There is nothing that says that a multi-CPU
> > system has to have any kind of automatic cache-coherence.)
> The first sentence here could be misleading, there are LOTS of systems
> where there is automatic cache-coherence, and of course the use of
> 'volatile' on such systems does indeed help. If you are working on
> a systemn without cache-coherence, you indeed have big problems, but
> that's rarely the case, most multi-processor computers in common use
> do guarantee cache coherence.
IMHO the statement is correct, but the justification is incorrect.
While most multiprocessor machines do provide cache coherence, many do not
guarantee strict ordering of memory accesses. In practice you need both for
correct operation. i.e. some form of explicit synchronisation is required on
most modern SMP systems.
Hardware cache coherence just makes this much quicker/easier to implement.
To a first approximation you need a pipeline flush rather than a cache flush.