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RE: Register allocation issues


On 05 September 2007 23:47, Matt Lee wrote:

> Registers r3 to r12 are volatiles. However, for the C code below,
> 
> struct foo {
>     int a[4];
> } ;
> 
> struct foo p, q;
> 
> void func ()
> {
>     memcpy (&p, &q, sizeof (struct foo));
> }
> 
> I am getting a instruction sequence for func() such as,
> 
> load r3, q + 0
> load r4, q + 4
> store r3, p + 0
> store r4, p + 4
> load r3, q + 4
> load r4, q + 8
> store r3, p + 4
> store r4, p + 8
> 
> The problem is, that though the loads can be optimized by pipelining
> them. The register allocator has created a dependency by using only r3
> and r4, instead of using the other volatiles.

  Does your backend define a movdi pattern?


    cheers,
      DaveK
-- 
Can't think of a witty .sigline today....


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