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Re: no_new_pseudos


Alexandre Oliva <aoliva@redhat.com> writes:

> On Jul  9, 2007, Ian Lance Taylor <iant@google.com> wrote:
> 
> > Or tell us how you think my patch should be changed.
> 
> #define no_new_pseudos (reload_in_progress || reload_completed)
> 
> if you want to reword it into a functional macro without a negative,
> then it would take modifying back-ends as well.  If so, I guess
> s,no_new_pseudos,can_gen_reg_rtx (),g or can_gen_new_pseudos() would
> do.

OK, what do you think of this patch?

Note that I spent less time writing this patch than I did replying to
the e-mail messages on this thread.

Ian

Index: rtl.h
===================================================================
--- rtl.h	(revision 126419)
+++ rtl.h	(working copy)
@@ -1958,6 +1958,11 @@ extern int epilogue_completed;
 
 extern int reload_in_progress;
 
+/* This macro indicates whether you may create a new
+   pseudo-register.  */
+
+#define may_create_pseudo_p() (!reload_in_progress && !reload_completed)
+
 #ifdef STACK_REGS
 /* Nonzero after end of regstack pass.
    Set to 1 or 0 by reg-stack.c.  */
Index: config/alpha/alpha.c
===================================================================
--- config/alpha/alpha.c	(revision 126419)
+++ config/alpha/alpha.c	(working copy)
@@ -933,7 +933,7 @@ alpha_legitimize_address (rtx x, rtx scr
      part of the CONST_INT.  Then load FOO plus any high-order part of the
      CONST_INT into a register.  Our address is (plus reg low-part-const).
      This is done to reduce the number of GOT entries.  */
-  if (!no_new_pseudos
+  if (may_create_pseudo_p ()
       && GET_CODE (x) == CONST
       && GET_CODE (XEXP (x, 0)) == PLUS
       && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
@@ -946,7 +946,7 @@ alpha_legitimize_address (rtx x, rtx scr
   /* If we have a (plus reg const), emit the load as in (2), then add
      the two registers, and finally generate (plus reg low-part-const) as
      our address.  */
-  if (!no_new_pseudos
+  if (may_create_pseudo_p ()
       && GET_CODE (x) == PLUS
       && GET_CODE (XEXP (x, 0)) == REG
       && GET_CODE (XEXP (x, 1)) == CONST
@@ -1069,7 +1069,7 @@ alpha_legitimize_address (rtx x, rtx scr
 	    return x;
 	  else
 	    {
-	      if (!no_new_pseudos)
+	      if (may_create_pseudo_p ())
 	        scratch = gen_reg_rtx (Pmode);
 	      emit_insn (gen_rtx_SET (VOIDmode, scratch,
 				      gen_rtx_HIGH (Pmode, x)));
@@ -1091,11 +1091,11 @@ alpha_legitimize_address (rtx x, rtx scr
 
     if (addend)
       x = expand_simple_binop (Pmode, PLUS, x, GEN_INT (addend),
-			       (no_new_pseudos ? scratch : NULL_RTX),
+			       (!may_create_pseudo_p () ? scratch : NULL_RTX),
 			       1, OPTAB_LIB_WIDEN);
     if (high)
       x = expand_simple_binop (Pmode, PLUS, x, GEN_INT (high),
-			       (no_new_pseudos ? scratch : NULL_RTX),
+			       (!may_create_pseudo_p () ? scratch : NULL_RTX),
 			       1, OPTAB_LIB_WIDEN);
 
     return plus_constant (x, low);
@@ -1644,7 +1644,7 @@ alpha_emit_set_const_1 (rtx target, enum
   int i, bits;
   /* Use a pseudo if highly optimizing and still generating RTL.  */
   rtx subtarget
-    = (flag_expensive_optimizations && !no_new_pseudos ? 0 : target);
+    = (flag_expensive_optimizations && may_create_pseudo_p () ? 0 : target);
   rtx temp, insn;
 
   /* If this is a sign-extended 32-bit constant, we can do this in at most
@@ -1688,7 +1688,7 @@ alpha_emit_set_const_1 (rtx target, enum
 	{
 	  if (no_output)
 	    return pc_rtx;
-	  if (no_new_pseudos)
+	  if (!may_create_pseudo_p ())
 	    {
 	      emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (high << 16)));
 	      temp = target;
@@ -1727,7 +1727,7 @@ alpha_emit_set_const_1 (rtx target, enum
      we can't make pseudos, we can't do anything since the expand_binop
      and expand_unop calls will widen and try to make pseudos.  */
 
-  if (n == 1 || (mode == SImode && no_new_pseudos))
+  if (n == 1 || (mode == SImode && !may_create_pseudo_p ()))
     return 0;
 
   /* Next, see if we can load a related constant and then shift and possibly
@@ -1895,7 +1895,7 @@ alpha_emit_set_const (rtx target, enum m
 
   /* If we can't make any pseudos, TARGET is an SImode hard register, we
      can't load this constant in one insn, do this in DImode.  */
-  if (no_new_pseudos && mode == SImode
+  if (!may_create_pseudo_p () && mode == SImode
       && GET_CODE (target) == REG && REGNO (target) < FIRST_PSEUDO_REGISTER)
     {
       result = alpha_emit_set_const_1 (target, mode, c, 1, no_output);
@@ -2700,7 +2700,7 @@ alpha_emit_conditional_move (rtx cmp, en
      conditional move.  Make sure we emit only comparisons we have;
      swap or reverse as necessary.  */
 
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     return NULL_RTX;
 
   switch (code)
@@ -2777,7 +2777,7 @@ alpha_split_conditional_move (enum rtx_c
   if (mode != DImode)
     {
       target = gen_lowpart (DImode, dest);
-      if (! no_new_pseudos)
+      if (may_create_pseudo_p ())
         subtarget = gen_reg_rtx (DImode);
       else
 	subtarget = target;
Index: config/alpha/alpha.md
===================================================================
--- config/alpha/alpha.md	(revision 126419)
+++ config/alpha/alpha.md	(working copy)
@@ -506,7 +506,7 @@
   operands[4] = GEN_INT (low);
   if (satisfies_constraint_L (rest_rtx))
     operands[3] = rest_rtx;
-  else if (! no_new_pseudos)
+  else if (may_create_pseudo_p ())
     {
       operands[3] = gen_reg_rtx (DImode);
       emit_move_insn (operands[3], operands[2]);
@@ -4370,14 +4370,14 @@
    (clobber (match_scratch:DI 5 "=r"))]
   ""
   "#"
-  "! no_new_pseudos || reload_completed"
+  ""
   [(set (match_dup 5)
 	(match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
 	(plus:DI (mult:DI (match_dup 5) (match_dup 3))
 		 (match_dup 4)))]
 {
-  if (! no_new_pseudos)
+  if (may_create_pseudo_p ())
     operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
     operands[5] = operands[0];
@@ -4395,14 +4395,14 @@
    (clobber (match_scratch:SI 5 "=r"))]
   ""
   "#"
-  "! no_new_pseudos || reload_completed"
+  ""
   [(set (match_dup 5)
 	(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
 	(plus:SI (mult:SI (match_dup 5) (match_dup 3))
 		 (match_dup 4)))]
 {
-  if (! no_new_pseudos)
+  if (may_create_pseudo_p ())
     operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
     operands[5] = operands[0];
@@ -4421,14 +4421,14 @@
    (clobber (match_scratch:SI 5 "=r"))]
   ""
   "#"
-  "! no_new_pseudos || reload_completed"
+  ""
   [(set (match_dup 5)
 	(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
 	(sign_extend:DI (plus:SI (mult:SI (match_dup 5) (match_dup 3))
 				 (match_dup 4))))]
 {
-  if (! no_new_pseudos)
+  if (may_create_pseudo_p ())
     operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
     operands[5] = operands[0];
@@ -4446,14 +4446,14 @@
    (clobber (match_scratch:DI 5 "=r"))]
   ""
   "#"
-  "! no_new_pseudos || reload_completed"
+  ""
   [(set (match_dup 5)
 	(match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
 	(minus:DI (mult:DI (match_dup 5) (match_dup 3))
 		  (match_dup 4)))]
 {
-  if (! no_new_pseudos)
+  if (may_create_pseudo_p ())
     operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
     operands[5] = operands[0];
@@ -4471,14 +4471,14 @@
    (clobber (match_scratch:SI 5 "=r"))]
   ""
   "#"
-  "! no_new_pseudos || reload_completed"
+  ""
   [(set (match_dup 5)
 	(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
 	(minus:SI (mult:SI (match_dup 5) (match_dup 3))
 		 (match_dup 4)))]
 {
-  if (! no_new_pseudos)
+  if (may_create_pseudo_p ())
     operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
     operands[5] = operands[0];
@@ -4497,14 +4497,14 @@
    (clobber (match_scratch:SI 5 "=r"))]
   ""
   "#"
-  "! no_new_pseudos || reload_completed"
+  ""
   [(set (match_dup 5)
 	(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
 	(sign_extend:DI (minus:SI (mult:SI (match_dup 5) (match_dup 3))
 				  (match_dup 4))))]
 {
-  if (! no_new_pseudos)
+  if (may_create_pseudo_p ())
     operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
     operands[5] = operands[0];
@@ -5760,7 +5760,7 @@
     {
       rtx in[2], out[2], target;
 
-      gcc_assert (!no_new_pseudos);
+      gcc_assert (may_create_pseudo_p ());
 
       split_double (operands[1], &in[0], &in[1]);
 
Index: config/frv/frv.md
===================================================================
--- config/frv/frv.md	(revision 126419)
+++ config/frv/frv.md	(working copy)
@@ -7874,7 +7874,7 @@
   ""
   "
 {
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     operands[6] = operands[5] = operands[0];
   else
     {
@@ -7902,7 +7902,7 @@
   ""
   "
 {
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     operands[6] = operands[5] = operands[0];
   else
     {
@@ -7950,7 +7950,7 @@
 {
   rtx insn;
 
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     operands[4] = operands[0];
   else
     operands[4] = gen_reg_rtx (SImode);
@@ -7976,7 +7976,7 @@
 {
   rtx insn;
 
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     {
       emit_insn (gen_symGOT2reg (operands[0], operands[1], operands[2],
 				 GEN_INT (R_FRV_GOT12)));
Index: config/s390/s390.c
===================================================================
--- config/s390/s390.c	(revision 126419)
+++ config/s390/s390.c	(working copy)
@@ -3383,7 +3383,7 @@ legitimize_tls_address (rtx addr, rtx re
 void
 emit_symbolic_move (rtx *operands)
 {
-  rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+  rtx temp = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
 
   if (GET_CODE (operands[0]) == MEM)
     operands[1] = force_reg (Pmode, operands[1]);
Index: config/s390/s390.md
===================================================================
--- config/s390/s390.md	(revision 126419)
+++ config/s390/s390.md	(working copy)
@@ -1394,7 +1394,7 @@
 {
   /* Make it explicit that loading a register from memory
      always sign-extends (at least) to SImode.  */
-  if (optimize && !no_new_pseudos
+  if (optimize && may_create_pseudo_p ()
       && register_operand (operands[0], VOIDmode)
       && GET_CODE (operands[1]) == MEM)
     {
@@ -1441,7 +1441,7 @@
 {
   /* On z/Architecture, zero-extending from memory to register
      is just as fast as a QImode load.  */
-  if (TARGET_ZARCH && optimize && !no_new_pseudos
+  if (TARGET_ZARCH && optimize && may_create_pseudo_p ()
       && register_operand (operands[0], VOIDmode)
       && GET_CODE (operands[1]) == MEM)
     {
@@ -1887,7 +1887,7 @@
     FAIL;
 
   operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     {
       if (GET_CODE (XEXP (operands[1], 0)) == REG)
 	{
@@ -1977,7 +1977,7 @@
 
   operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
 
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     {
       if (GET_CODE (XEXP (operands[0], 0)) == REG)
 	{
Index: config/m32c/m32c.c
===================================================================
--- config/m32c/m32c.c	(revision 126419)
+++ config/m32c/m32c.c	(working copy)
@@ -3155,7 +3155,7 @@ m32c_prepare_move (rtx * operands, enum 
       emit_insn (gen_rtx_SET (Pmode, dest_reg, dest_mod));
       operands[0] = gen_rtx_MEM (mode, dest_reg);
     }
-  if (!no_new_pseudos && MEM_P (operands[0]) && MEM_P (operands[1]))
+  if (may_create_pseudo_p () && MEM_P (operands[0]) && MEM_P (operands[1]))
     operands[1] = copy_to_mode_reg (mode, operands[1]);
   return 0;
 }
@@ -3220,7 +3220,7 @@ m32c_split_move (rtx * operands, enum ma
 
   /* Before splitting mem-mem moves, force one operand into a
      register.  */
-  if (!no_new_pseudos && MEM_P (operands[0]) && MEM_P (operands[1]))
+  if (may_create_pseudo_p () && MEM_P (operands[0]) && MEM_P (operands[1]))
     {
 #if DEBUG0
       fprintf (stderr, "force_reg...\n");
@@ -3235,7 +3235,8 @@ m32c_split_move (rtx * operands, enum ma
   parts = 2;
 
 #if DEBUG_SPLIT
-  fprintf (stderr, "\nsplit_move %d all=%d\n", no_new_pseudos, split_all);
+  fprintf (stderr, "\nsplit_move %d all=%d\n", !may_create_pseudo_p (),
+	   split_all);
   debug_rtx (operands[0]);
   debug_rtx (operands[1]);
 #endif
@@ -3774,7 +3775,7 @@ m32c_expand_insv (rtx *operands)
 	op0 = sub;
     }
 
-  if (no_new_pseudos
+  if (!may_create_pseudo_p ()
       || (GET_CODE (op0) == MEM && MEM_VOLATILE_P (op0)))
     src0 = op0;
   else
Index: config/spu/spu.c
===================================================================
--- config/spu/spu.c	(revision 126419)
+++ config/spu/spu.c	(working copy)
@@ -1420,7 +1420,7 @@ spu_split_immediate (rtx * ops)
 	rtx to, hi, lo;
 	int i;
 	constant_to_array (mode, ops[1], arrhi);
-	to = no_new_pseudos ? ops[0] : gen_reg_rtx (mode);
+	to = !may_create_pseudo_p () ? ops[0] : gen_reg_rtx (mode);
 	for (i = 0; i < 16; i += 4)
 	  {
 	    arrlo[i + 2] = arrhi[i + 2];
Index: config/sparc/sparc.md
===================================================================
--- config/sparc/sparc.md	(revision 126419)
+++ config/sparc/sparc.md	(working copy)
@@ -1845,7 +1845,7 @@
 {
   current_function_uses_pic_offset_table = 1;
   operands[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     {
       operands[3] = operands[0];
       operands[4] = operands[0];
@@ -1994,7 +1994,7 @@
 {
   current_function_uses_pic_offset_table = 1;
   operands[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     {
       operands[3] = operands[0];
       operands[4] = operands[0];
Index: config/sparc/sparc.c
===================================================================
--- config/sparc/sparc.c	(revision 126419)
+++ config/sparc/sparc.c	(working copy)
@@ -3088,7 +3088,7 @@ legitimize_tls_address (rtx addr)
 {
   rtx temp1, temp2, temp3, ret, o0, got, insn;
 
-  gcc_assert (! no_new_pseudos);
+  gcc_assert (may_create_pseudo_p ());
 
   if (GET_CODE (addr) == SYMBOL_REF)
     switch (SYMBOL_REF_TLS_MODEL (addr))
@@ -8598,7 +8598,6 @@ sparc_output_mi_thunk (FILE *file, tree 
 
   reload_completed = 1;
   epilogue_completed = 1;
-  no_new_pseudos = 1;
 
   emit_note (NOTE_INSN_PROLOGUE_END);
 
@@ -8784,7 +8783,6 @@ sparc_output_mi_thunk (FILE *file, tree 
 
   reload_completed = 0;
   epilogue_completed = 0;
-  no_new_pseudos = 0;
 }
 
 /* Return true if sparc_output_mi_thunk would be able to output the
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md	(revision 126419)
+++ config/i386/i386.md	(working copy)
@@ -15316,7 +15316,7 @@
      (clobber (reg:CC FLAGS_REG))])]
   "!TARGET_64BIT && TARGET_GNU2_TLS"
 {
-  operands[3] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+  operands[3] = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
   ix86_tls_descriptor_calls_expanded_in_cfun = true;
 })
 
@@ -15365,7 +15365,7 @@
   ""
   [(set (match_dup 0) (match_dup 5))]
 {
-  operands[5] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+  operands[5] = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
   emit_insn (gen_tls_dynamic_gnu2_32 (operands[5], operands[1], operands[2]));
 })
 
@@ -15380,7 +15380,7 @@
      (clobber (reg:CC FLAGS_REG))])]
   "TARGET_64BIT && TARGET_GNU2_TLS"
 {
-  operands[2] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+  operands[2] = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
   ix86_tls_descriptor_calls_expanded_in_cfun = true;
 })
 
@@ -15424,7 +15424,7 @@
   ""
   [(set (match_dup 0) (match_dup 4))]
 {
-  operands[4] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+  operands[4] = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
   emit_insn (gen_tls_dynamic_gnu2_64 (operands[4], operands[1]));
 })
 
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 126419)
+++ config/i386/i386.c	(working copy)
@@ -9799,7 +9799,7 @@ ix86_expand_move (enum machine_mode mode
 	    op1 = force_reg (Pmode, op1);
 	  else if (!TARGET_64BIT || !x86_64_movabs_operand (op1, Pmode))
 	    {
-	      rtx reg = no_new_pseudos ? op0 : NULL_RTX;
+	      rtx reg = !may_create_pseudo_p () ? op0 : NULL_RTX;
 	      op1 = legitimize_pic_address (op1, reg);
 	      if (op0 == op1)
 		return;
@@ -9874,7 +9874,7 @@ ix86_expand_vector_move (enum machine_mo
      are moved via xmm registers, and moving them to stack can result in
      unaligned memory access.  Use ix86_expand_vector_move_misalign()
      if memory operand is not aligned correctly.  */
-  if (!no_new_pseudos
+  if (may_create_pseudo_p ()
       && (mode == TImode) && !TARGET_64BIT
       && ((MEM_P (op0) && (MEM_ALIGN (op0) < align))
 	  || (MEM_P (op1) && (MEM_ALIGN (op1) < align))))
@@ -9898,7 +9898,7 @@ ix86_expand_vector_move (enum machine_mo
     }
 
   /* Make operand1 a register if it isn't already.  */
-  if (!no_new_pseudos
+  if (may_create_pseudo_p ()
       && !register_operand (op0, mode)
       && !register_operand (op1, mode))
     {
@@ -11325,7 +11325,7 @@ ix86_prepare_fp_compare_args (enum rtx_c
   /* Try to rearrange the comparison to make it cheaper.  */
   if (ix86_fp_comparison_cost (code)
       > ix86_fp_comparison_cost (swap_condition (code))
-      && (REG_P (op1) || !no_new_pseudos))
+      && (REG_P (op1) || may_create_pseudo_p ()))
     {
       rtx tmp;
       tmp = op0, op0 = op1, op1 = tmp;
@@ -12055,7 +12055,7 @@ ix86_expand_carry_flag_compare (enum rtx
   /* Swapping operands may cause constant to appear as first operand.  */
   if (!nonimmediate_operand (op0, VOIDmode))
     {
-      if (no_new_pseudos)
+      if (!may_create_pseudo_p ())
 	return false;
       op0 = force_reg (mode, op0);
     }
Index: config/sh/predicates.md
===================================================================
--- config/sh/predicates.md	(revision 126419)
+++ config/sh/predicates.md	(working copy)
@@ -782,7 +782,7 @@
   if (GET_CODE (op) == CONST_INT)
     return (TARGET_SHMEDIA
 	    ? (satisfies_constraint_I06 (op)
-	       || (no_new_pseudos && INTVAL (op) == 0xff))
+	       || (!may_create_pseudo_p () && INTVAL (op) == 0xff))
 	    : satisfies_constraint_K08 (op));
   if (TARGET_SHMEDIA
       && mode != DImode && GET_CODE (op) == SUBREG
Index: config/sh/sh.c
===================================================================
--- config/sh/sh.c	(revision 126419)
+++ config/sh/sh.c	(working copy)
@@ -1192,7 +1192,9 @@ prepare_move_operands (rtx operands[], e
 	    /* It's ok.  */;
 	  else
 	    {
-	      temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+	      temp = (!may_create_pseudo_p ()
+		      ? operands[0]
+		      : gen_reg_rtx (Pmode));
 	      operands[1] = legitimize_pic_address (operands[1], mode, temp);
 	    }
 	}
@@ -1200,13 +1202,14 @@ prepare_move_operands (rtx operands[], e
 	       && GET_CODE (XEXP (operands[1], 0)) == PLUS
 	       && SYMBOLIC_CONST_P (XEXP (XEXP (operands[1], 0), 0)))
 	{
-	  temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+	  temp = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
 	  temp = legitimize_pic_address (XEXP (XEXP (operands[1], 0), 0),
 					 mode, temp);
 	  operands[1] = expand_binop (mode, add_optab, temp,
 				      XEXP (XEXP (operands[1], 0), 1),
-				      no_new_pseudos ? temp
-				      : gen_reg_rtx (Pmode),
+				      (!may_create_pseudo_p ()
+				       ? temp
+				       : gen_reg_rtx (Pmode)),
 				      0, OPTAB_LIB_WIDEN);
 	}
     }
@@ -1298,7 +1301,7 @@ prepare_move_operands (rtx operands[], e
 		  if (flag_schedule_insns)
 		    emit_insn (gen_blockage ());
 		}
-	      tga_op1 = no_new_pseudos ? op0 : gen_reg_rtx (Pmode);
+	      tga_op1 = !may_create_pseudo_p () ? op0 : gen_reg_rtx (Pmode);
 	      tmp = gen_sym2GOTTPOFF (op1);
 	      emit_insn (gen_tls_initial_exec (tga_op1, tmp));
 	      op1 = tga_op1;
@@ -1389,7 +1392,7 @@ prepare_cbranch_operands (rtx *operands,
 	}
     }
   op1 = operands[1];
-  if (!no_new_pseudos)
+  if (may_create_pseudo_p ())
     operands[1] = force_reg (mode, op1);
   /* When we are handling DImode comparisons, we want to keep constants so
      that we can optimize the component comparisons; however, memory loads
@@ -1412,7 +1415,7 @@ prepare_cbranch_operands (rtx *operands,
 	  emit_move_insn (scratch, operands[2]);
 	  operands[2] = scratch;
 	}
-      else if (!no_new_pseudos)
+      else if (may_create_pseudo_p ())
 	operands[2] = force_reg (mode, operands[2]);
     }
   return comparison;
@@ -8323,7 +8326,7 @@ emit_fpu_switch (rtx scratch, int index)
     }
 
   src = DECL_RTL (fpscr_values);
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     {
       emit_move_insn (scratch, XEXP (src, 0));
       if (index != 0)
@@ -8492,7 +8495,7 @@ fpscr_set_from_mem (int mode, HARD_REG_S
   enum attr_fp_mode norm_mode = ACTUAL_NORMAL_MODE (FP_MODE);
   rtx addr_reg;
 
-  addr_reg = no_new_pseudos ? get_free_reg (regs_live) : NULL_RTX;
+  addr_reg = !may_create_pseudo_p () ? get_free_reg (regs_live) : NULL_RTX;
   emit_fpu_switch (addr_reg, fp_mode == norm_mode);
 }
 
@@ -10130,7 +10133,6 @@ sh_output_mi_thunk (FILE *file, tree thu
 
   reload_completed = 1;
   epilogue_completed = 1;
-  no_new_pseudos = 1;
   current_function_uses_only_leaf_regs = 1;
 
   emit_note (NOTE_INSN_PROLOGUE_END);
@@ -10355,7 +10357,6 @@ sh_output_mi_thunk (FILE *file, tree thu
 
   reload_completed = 0;
   epilogue_completed = 0;
-  no_new_pseudos = 0;
 }
 
 rtx
@@ -10432,11 +10433,12 @@ sh_get_pr_initial_val (void)
 
   /* If we haven't finished rtl generation, there might be a nonlocal label
      that we haven't seen yet.
-     ??? get_hard_reg_initial_val fails if it is called while no_new_pseudos
-     is set, unless it has been called before for the same register.  And even
-     then, we end in trouble if we didn't use the register in the same
-     basic block before.  So call get_hard_reg_initial_val now and wrap it
-     in an unspec if we might need to replace it.  */
+     ??? get_hard_reg_initial_val fails if it is called after register
+     allocation has started, unless it has been called before for the
+     same register.  And even then, we end in trouble if we didn't use
+     the register in the same basic block before.  So call
+     get_hard_reg_initial_val now and wrap it in an unspec if we might
+     need to replace it.  */
   /* ??? We also must do this for TARGET_SH1 in general, because otherwise
      combine can put the pseudo returned by get_hard_reg_initial_val into
      instructions that need a general purpose registers, which will fail to
Index: config/sh/sh.md
===================================================================
--- config/sh/sh.md	(revision 126419)
+++ config/sh/sh.md	(working copy)
@@ -985,7 +985,7 @@
     {
       rtx tmp;
 
-      if (no_new_pseudos)
+      if (!may_create_pseudo_p ())
 	FAIL;
 
       tmp = gen_reg_rtx (DImode);
@@ -1205,7 +1205,7 @@
 		   (match_operand:SI 3 "register_operand" "0"))
 		 (match_operand:SI 4 "arith_reg_or_0_operand" "r")))
    (clobber (match_scratch:SI 5 "=&r"))]
-  "TARGET_SHMEDIA && no_new_pseudos"
+  "TARGET_SHMEDIA && !may_create_pseudo_p ()"
   "#"
   "TARGET_SHMEDIA && reload_completed"
   [(pc)]
@@ -1289,7 +1289,7 @@
     {
       rtx tmp;
 
-      if (no_new_pseudos)
+      if (!may_create_pseudo_p ())
 	FAIL;
 
       tmp = gen_reg_rtx (SImode);
@@ -1398,7 +1398,7 @@
 {
   if (TARGET_SH1)
     {
-      if (no_new_pseudos && ! arith_reg_operand (operands[2], DImode))
+      if (!may_create_pseudo_p () && ! arith_reg_operand (operands[2], DImode))
         FAIL;
       operands[2] = force_reg (DImode, operands[2]);
       emit_insn (gen_adddi3_compact (operands[0], operands[1], operands[2]));
@@ -1693,7 +1693,8 @@
     }
   if (TARGET_SHMEDIA)
     {
-      if (no_new_pseudos && ! arith_reg_or_0_operand (operands[1], SImode))
+      if (!may_create_pseudo_p ()
+	  && ! arith_reg_or_0_operand (operands[1], SImode))
 	FAIL;
       if (operands[1] != const0_rtx && GET_CODE (operands[1]) != SUBREG)
 	operands[1] = force_reg (SImode, operands[1]);
@@ -2357,7 +2358,7 @@ norm32: r25
    (clobber (match_operand:DI 8 "register_operand" "=r"))]
   "TARGET_SHMEDIA"
   "#"
-  "&& no_new_pseudos"
+  "&& !may_create_pseudo_p ()"
   [(pc)]
   "
 {
@@ -2401,7 +2402,7 @@ norm32: r25
    (clobber (match_operand:DI 4 "register_operand" "=r"))]
   "TARGET_SHMEDIA"
   "#"
-  "&& no_new_pseudos"
+  "&& !may_create_pseudo_p ()"
   [(pc)]
   "
 {
@@ -2445,7 +2446,7 @@ norm32: r25
    (clobber (match_operand:DI 13 "register_operand" "=r"))]
   "TARGET_SHMEDIA"
   "#"
-  "&& no_new_pseudos"
+  "&& !may_create_pseudo_p ()"
   [(pc)]
   "
 {
@@ -2512,7 +2513,7 @@ norm32: r25
    && (TARGET_DIVIDE_INV_MINLAT
        || TARGET_DIVIDE_INV20U || TARGET_DIVIDE_INV20L)"
   "#"
-  "&& no_new_pseudos"
+  "&& !may_create_pseudo_p ()"
   [(pc)]
   "
 {
@@ -2679,7 +2680,7 @@ label:
    (clobber (match_operand:DF 9 "fp_arith_reg_operand" ""))
    (clobber (match_operand:DF 10 "fp_arith_reg_operand" ""))
    (clobber (match_operand:DF 11 "fp_arith_reg_operand" ""))]
-  "TARGET_SHMEDIA_FPU && TARGET_DIVIDE_INV_FP && no_new_pseudos"
+  "TARGET_SHMEDIA_FPU && TARGET_DIVIDE_INV_FP && !may_create_pseudo_p ()"
   "#"
   "&& 1"
   [(set (match_dup 9) (float:DF (match_dup 1)))
@@ -8689,8 +8690,8 @@ label:
 {
   rtx insn, mem;
 
-  operands[2] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
-  operands[3] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+  operands[2] = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
+  operands[3] = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
 
   if (TARGET_SHMEDIA)
     {
@@ -8789,7 +8790,9 @@ label:
   "
 {
   rtx gotoffsym, insn;
-  rtx t = no_new_pseudos ? operands[0] : gen_reg_rtx (GET_MODE (operands[0]));
+  rtx t = (!may_create_pseudo_p ()
+	   ? operands[0]
+	   : gen_reg_rtx (GET_MODE (operands[0]));
 
   gotoffsym = gen_sym2GOTOFF (operands[1]);
   PUT_MODE (gotoffsym, Pmode);
@@ -8909,7 +8912,9 @@ mov.l\\t1f,r4\\n\\
   "
 {
   rtx dtpoffsym, insn;
-  rtx t = no_new_pseudos ? operands[0] : gen_reg_rtx (GET_MODE (operands[0]));
+  rtx t = (!may_create_pseudo_p ()
+	   ? operands[0]
+	   : gen_reg_rtx (GET_MODE (operands[0]));
 
   dtpoffsym = gen_sym2DTPOFF (operands[1]);
   PUT_MODE (dtpoffsym, Pmode);
@@ -9495,8 +9500,9 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) != SImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
 
       switch (GET_MODE (sh_compare_op0))
 	{
@@ -9559,8 +9565,9 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) != SImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
 
       switch (GET_MODE (sh_compare_op0))
 	{
@@ -9622,14 +9629,15 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) != SImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
 
       switch (GET_MODE (sh_compare_op0))
 	{
 	case SImode:
 	  {
-	    tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+	    tmp = !may_create_pseudo_p () ? reg : gen_reg_rtx (SImode);
 
 	    emit_insn (gen_cmpgtsi_media (tmp,
 					  sh_compare_op0, sh_compare_op1));
@@ -9639,7 +9647,7 @@ mov.l\\t1f,r0\\n\\
 
 	case DImode:
 	  {
-	    tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+	    tmp = !may_create_pseudo_p () ? reg : gen_reg_rtx (SImode);
 
 	    emit_insn (gen_cmpgtdi_media (tmp,
 					  sh_compare_op0, sh_compare_op1));
@@ -9689,8 +9697,9 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) != SImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p () ?
+	       gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
       sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
       if (sh_compare_op1 != const0_rtx)
 	sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode
@@ -9753,8 +9762,9 @@ mov.l\\t1f,r0\\n\\
 	mode = GET_MODE (sh_compare_op1);
       reg = operands[0];
       if (GET_MODE (operands[0]) != SImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
       sh_compare_op0 = force_reg (mode, sh_compare_op0);
       if (sh_compare_op1 != const0_rtx)
 	sh_compare_op1 = force_reg (mode, sh_compare_op1);
@@ -9763,7 +9773,7 @@ mov.l\\t1f,r0\\n\\
 	{
 	case SImode:
 	  {
-	    rtx tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+	    rtx tmp = !may_create_pseudo_p () ? reg : gen_reg_rtx (SImode);
 
 	    emit_insn (gen_cmpgtsi_media (tmp,
 					  sh_compare_op1, sh_compare_op0));
@@ -9773,7 +9783,7 @@ mov.l\\t1f,r0\\n\\
 
 	case DImode:
 	  {
-	    rtx tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+	    rtx tmp = !may_create_pseudo_p () ? reg : gen_reg_rtx (SImode);
 
 	    emit_insn (gen_cmpgtdi_media (tmp,
 					  sh_compare_op1, sh_compare_op0));
@@ -9837,8 +9847,9 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) == DImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
       sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
       if (sh_compare_op1 != const0_rtx)
 	sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode
@@ -9870,8 +9881,9 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) == DImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
       sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
       if (sh_compare_op1 != const0_rtx)
 	sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode
@@ -9903,8 +9915,9 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) != SImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
       sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
       if (sh_compare_op1 != const0_rtx)
 	sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode
@@ -9912,7 +9925,7 @@ mov.l\\t1f,r0\\n\\
 				    : GET_MODE (sh_compare_op1),
 				    sh_compare_op1);
 
-      tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+      tmp = !may_create_pseudo_p () ? reg : gen_reg_rtx (SImode);
 
       emit_insn (gen_cmpgtudi_media (tmp, sh_compare_op0, sh_compare_op1));
       emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx));
@@ -9938,8 +9951,9 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) != SImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
       sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
       if (sh_compare_op1 != const0_rtx)
 	sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode
@@ -9947,7 +9961,7 @@ mov.l\\t1f,r0\\n\\
 				    : GET_MODE (sh_compare_op1),
 				    sh_compare_op1);
 
-      tmp = no_new_pseudos ? operands[0] : gen_reg_rtx (SImode);
+      tmp = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (SImode);
 
       emit_insn (gen_cmpgtudi_media (tmp, sh_compare_op1, sh_compare_op0));
       emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx));
@@ -9987,8 +10001,9 @@ mov.l\\t1f,r0\\n\\
 
       reg = operands[0];
       if (GET_MODE (operands[0]) != SImode)
-	reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
-			     : gen_reg_rtx (SImode);
+	reg = (!may_create_pseudo_p ()
+	       ? gen_rtx_SUBREG (SImode, operands[0], 0)
+	       : gen_reg_rtx (SImode));
       if (! TARGET_SHMEDIA_FPU
 	  && GET_MODE (sh_compare_op0) != DImode
 	  && GET_MODE (sh_compare_op0) != SImode)
@@ -10001,7 +10016,7 @@ mov.l\\t1f,r0\\n\\
 				    : GET_MODE (sh_compare_op1),
 				    sh_compare_op1);
 
-      tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+      tmp = !may_create_pseudo_p () ? reg : gen_reg_rtx (SImode);
 
       emit_insn (gen_seq (tmp));
       emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx));
Index: config/cris/cris.c
===================================================================
--- config/cris/cris.c	(revision 126419)
+++ config/cris/cris.c	(working copy)
@@ -3181,7 +3181,7 @@ cris_expand_pic_call_address (rtx *opp)
     {
       enum cris_pic_symbol_type t = cris_pic_symbol_type_of (op);
 
-      CRIS_ASSERT (!no_new_pseudos);
+      CRIS_ASSERT (may_create_pseudo_p ());
 
       /* For local symbols (non-PLT), just get the plain symbol
 	 reference into a register.  For symbols that can be PLT, make
@@ -3196,7 +3196,7 @@ cris_expand_pic_call_address (rtx *opp)
 		 "move.d (const (unspec [sym] CRIS_UNSPEC_PLT)),rM"
 		 "add.d rPIC,rM,rO", "jsr rO".  */
 	      rtx tem, rm, ro;
-	      gcc_assert (! no_new_pseudos);
+	      gcc_assert (may_create_pseudo_p ());
 	      current_function_uses_pic_offset_table = 1;
 	      tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op), CRIS_UNSPEC_PLT);
 	      rm = gen_reg_rtx (Pmode);
@@ -3222,7 +3222,7 @@ cris_expand_pic_call_address (rtx *opp)
 		 access of the PLTGOT isn't constant).  */
 	      rtx tem, mem, rm, ro;
 
-	      gcc_assert (! no_new_pseudos);
+	      gcc_assert (may_create_pseudo_p ());
 	      current_function_uses_pic_offset_table = 1;
 	      tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op),
 				    CRIS_UNSPEC_PLTGOTREAD);
Index: config/cris/cris.md
===================================================================
--- config/cris/cris.md	(revision 126419)
+++ config/cris/cris.md	(working copy)
@@ -789,7 +789,7 @@
   if (MEM_P (operands[0])
       && ! REG_S_P (operands[1])
       && operands[1] != const0_rtx
-      && ! no_new_pseudos)
+      && may_create_pseudo__p ())
     operands[1] = force_reg (SImode, operands[1]);
 
   /* If we're generating PIC and have an incoming symbol, validize it to a
@@ -810,7 +810,7 @@
 	  {
 	    /* We must have a register as destination for what we're about to
 	       do, and for the patterns we generate.  */
-	    CRIS_ASSERT (!no_new_pseudos);
+	    CRIS_ASSERT (may_create_pseudo_p ());
 	    operands[1] = force_reg (SImode, operands[1]);
 	  }
 	else
@@ -829,7 +829,7 @@
 		  ? operands[1] : get_related_value (operands[1]);
 		HOST_WIDE_INT offs = get_integer_term (operands[1]);
 
-		gcc_assert (! no_new_pseudos);
+		gcc_assert (may_create_pseudo_p ());
 		tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, sym),
 				      CRIS_UNSPEC_GOTREL);
 		if (offs != 0)
@@ -848,7 +848,7 @@
 		   "add.d rPIC,rM,rO", "move.d [rO],rN" with
 		   the memory access marked as read-only.  */
 		rtx tem, mem, rm, ro, rn = operands[0];
-		gcc_assert (! no_new_pseudos);
+		gcc_assert (may_create_pseudo_p ());
 		tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, operands[1]),
 				      CRIS_UNSPEC_GOTREAD);
 		rm = gen_reg_rtx (Pmode);
@@ -879,7 +879,7 @@
 		rtx sym = get_related_value (operands[1]);
 		HOST_WIDE_INT offs = get_integer_term (operands[1]);
 
-		gcc_assert (! no_new_pseudos
+		gcc_assert (may_create_pseudo_p ()
 			    && t == cris_got_symbol_needing_fixup
 			    && sym != NULL_RTX && offs != 0);
 
Index: config/mn10300/mn10300.md
===================================================================
--- config/mn10300/mn10300.md	(revision 126419)
+++ config/mn10300/mn10300.md	(working copy)
@@ -307,7 +307,9 @@
 	    operands[1] = force_reg (Pmode, operands[1]);
 	  else
 	    {
-	      temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+	      temp = (!may_create_pseudo_p ()
+		      ? operands[0]
+		      : gen_reg_rtx (Pmode));
 	      operands[1] = legitimize_pic_address (operands[1], temp);
 	    }
 	}
@@ -315,13 +317,14 @@
 	       && GET_CODE (XEXP (operands[1], 0)) == PLUS
 	       && SYMBOLIC_CONST_P (XEXP (XEXP (operands[1], 0), 0)))
 	{
-	  temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+	  temp = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
 	  temp = legitimize_pic_address (XEXP (XEXP (operands[1], 0), 0),
 					 temp);
 	  operands[1] = expand_binop (SImode, add_optab, temp,
 				      XEXP (XEXP (operands[1], 0), 1),
-				      no_new_pseudos ? temp
-				      : gen_reg_rtx (Pmode),
+				      (!may_create_pseudo_p ()
+				       ? temp
+				       : gen_reg_rtx (Pmode)),
 				      0, OPTAB_LIB_WIDEN);
 	}
     }
Index: config/ia64/ia64.c
===================================================================
--- config/ia64/ia64.c	(revision 126419)
+++ config/ia64/ia64.c	(working copy)
@@ -1028,7 +1028,7 @@ ia64_expand_move (rtx op0, rtx op1)
 
       if (addend)
 	{
-	  rtx subtarget = no_new_pseudos ? op0 : gen_reg_rtx (mode);
+	  rtx subtarget = !may_create_pseudo_p () ? op0 : gen_reg_rtx (mode);
 
 	  emit_insn (gen_rtx_SET (VOIDmode, subtarget, op1));
 
@@ -1342,7 +1342,7 @@ ia64_expand_movxf_movrf (enum machine_mo
 
       /* We're hoping to transform everything that deals with XFmode
 	 quantities and GR registers early in the compiler.  */
-      gcc_assert (!no_new_pseudos);
+      gcc_assert (may_create_pseudo_p ());
 
       /* Struct to register can just use TImode instead.  */
       if ((GET_CODE (operands[1]) == SUBREG
@@ -1392,7 +1392,7 @@ ia64_expand_movxf_movrf (enum machine_mo
     {
       /* We're hoping to transform everything that deals with XFmode
 	 quantities and GR registers early in the compiler.  */
-      gcc_assert (!no_new_pseudos);
+      gcc_assert (may_create_pseudo_p ());
 
       /* Op0 can't be a GR_REG here, as that case is handled above.
 	 If op0 is a register, then we spill op1, so that we now have a
@@ -9455,7 +9455,6 @@ ia64_output_mi_thunk (FILE *file, tree t
 
   reload_completed = 1;
   epilogue_completed = 1;
-  no_new_pseudos = 1;
 
   /* Set things up as ia64_expand_prologue might.  */
   last_scratch_gr_reg = 15;
@@ -9580,7 +9579,6 @@ ia64_output_mi_thunk (FILE *file, tree t
 
   reload_completed = 0;
   epilogue_completed = 0;
-  no_new_pseudos = 0;
 }
 
 /* Worker function for TARGET_STRUCT_VALUE_RTX.  */
Index: config/m68k/m68k.md
===================================================================
--- config/m68k/m68k.md	(revision 126419)
+++ config/m68k/m68k.md	(working copy)
@@ -665,7 +665,7 @@
       if (GET_CODE (base) == SYMBOL_REF
 	  && !offset_within_block_p (base, INTVAL (offset)))
 	{
-	  tmp = no_new_pseudos ? operands[0] : gen_reg_rtx (SImode);
+	  tmp = !may_create_pseudo_p () ? operands[0] : gen_reg_rtx (SImode);
 	  emit_move_insn (tmp, base);
 	  emit_insn (gen_addsi3 (operands[0], tmp, offset));
 	  DONE;
Index: config/m68k/m68k.c
===================================================================
--- config/m68k/m68k.c	(revision 126419)
+++ config/m68k/m68k.c	(working copy)
@@ -4129,7 +4129,6 @@ m68k_output_mi_thunk (FILE *file, tree t
   rtx this_slot, offset, addr, mem, insn;
 
   /* Pretend to be a post-reload pass while generating rtl.  */
-  no_new_pseudos = 1;
   reload_completed = 1;
 
   /* The "this" pointer is stored at 4(%sp).  */
@@ -4203,7 +4202,6 @@ m68k_output_mi_thunk (FILE *file, tree t
 
   /* Clean up the vars set above.  */
   reload_completed = 0;
-  no_new_pseudos = 0;
 
   /* Restore the original PIC register.  */
   if (flag_pic)
Index: config/rs6000/rs6000.c
===================================================================
--- config/rs6000/rs6000.c	(revision 126419)
+++ config/rs6000/rs6000.c	(working copy)
@@ -4060,7 +4060,7 @@ rs6000_emit_set_const (rtx dest, enum ma
       return dest;
 
     case SImode:
-      result = no_new_pseudos ? dest : gen_reg_rtx (SImode);
+      result = !may_create_pseudo_p () ? dest : gen_reg_rtx (SImode);
 
       emit_insn (gen_rtx_SET (VOIDmode, copy_rtx (result),
 			      GEN_INT (INTVAL (source)
@@ -4279,7 +4279,7 @@ rs6000_emit_move (rtx dest, rtx source, 
       return;
     }
 
-  if (!no_new_pseudos && GET_CODE (operands[0]) == MEM
+  if (may_create_pseudo_p () && GET_CODE (operands[0]) == MEM
       && !gpc_reg_operand (operands[1], mode))
     operands[1] = force_reg (mode, operands[1]);
 
@@ -4302,7 +4302,7 @@ rs6000_emit_move (rtx dest, rtx source, 
       if (FP_REGNO_P (regnum) || regnum >= FIRST_PSEUDO_REGISTER)
 	{
 	  rtx newreg;
-	  newreg = (no_new_pseudos ? copy_rtx (operands[1])
+	  newreg = (!may_create_pseudo_p () ? copy_rtx (operands[1])
 		    : gen_reg_rtx (mode));
 	  emit_insn (gen_aux_truncdfsf2 (newreg, operands[1]));
 	  operands[1] = newreg;
@@ -4429,7 +4429,9 @@ rs6000_emit_move (rtx dest, rtx source, 
 	  && GET_CODE (operands[1]) != HIGH
 	  && GET_CODE (operands[1]) != CONST_INT)
 	{
-	  rtx target = (no_new_pseudos ? operands[0] : gen_reg_rtx (mode));
+	  rtx target = (!may_create_pseudo_p ()
+			? operands[0]
+			: gen_reg_rtx (mode));
 
 	  /* If this is a function address on -mcall-aixdesc,
 	     convert it to the address of the descriptor.  */
@@ -10489,7 +10491,8 @@ rs6000_got_register (rtx value ATTRIBUTE
   /* The second flow pass currently (June 1999) can't update
      regs_ever_live without disturbing other parts of the compiler, so
      update it here to make the prolog/epilogue code happy.  */
-  if (no_new_pseudos && ! df_regs_ever_live_p (RS6000_PIC_OFFSET_TABLE_REGNUM))
+  if (!may_create_pseudo_p ()
+      && !df_regs_ever_live_p (RS6000_PIC_OFFSET_TABLE_REGNUM))
     df_set_regs_ever_live (RS6000_PIC_OFFSET_TABLE_REGNUM, true);
 
   current_function_uses_pic_offset_table = 1;
@@ -14201,7 +14204,7 @@ uses_TOC (void)
 rtx
 create_TOC_reference (rtx symbol)
 {
-  if (no_new_pseudos)
+  if (!may_create_pseudo_p ())
     df_set_regs_ever_live (TOC_REGISTER, true);
   return gen_rtx_PLUS (Pmode,
 	   gen_rtx_REG (Pmode, TOC_REGISTER),
@@ -16148,7 +16151,6 @@ rs6000_output_mi_thunk (FILE *file, tree
 
   reload_completed = 1;
   epilogue_completed = 1;
-  no_new_pseudos = 1;
 
   /* Mark the end of the (empty) prologue.  */
   emit_note (NOTE_INSN_PROLOGUE_END);
@@ -16236,7 +16238,6 @@ rs6000_output_mi_thunk (FILE *file, tree
 
   reload_completed = 0;
   epilogue_completed = 0;
-  no_new_pseudos = 0;
 }
 
 /* A quick summary of the various types of 'constant-pool tables'
@@ -19437,7 +19438,7 @@ rs6000_machopic_legitimize_pic_address (
 
       /* Use a different reg for the intermediate value, as
 	 it will be marked UNCHANGING.  */
-      reg_temp = no_new_pseudos ? reg : gen_reg_rtx (Pmode);
+      reg_temp = !may_create_pseudo_p () ? reg : gen_reg_rtx (Pmode);
       base = rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 0),
 						     Pmode, reg_temp);
       offset =
Index: config/rs6000/rs6000.md
===================================================================
--- config/rs6000/rs6000.md	(revision 126419)
+++ config/rs6000/rs6000.md	(working copy)
@@ -1468,7 +1468,8 @@
   else if (GET_CODE (operands[2]) == CONST_INT
 	   && ! add_operand (operands[2], <MODE>mode))
     {
-      rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+      rtx tmp = ((!may_create_pseudo_p ()
+		  || rtx_equal_p (operands[0], operands[1]))
 		 ? operands[0] : gen_reg_rtx (<MODE>mode));
 
       HOST_WIDE_INT val = INTVAL (operands[2]);
@@ -1591,7 +1592,7 @@
   operands[4] = GEN_INT (low);
   if (<MODE>mode == SImode || satisfies_constraint_L (GEN_INT (rest)))
     operands[3] = GEN_INT (rest);
-  else if (! no_new_pseudos)
+  else if (may_create_pseudo_p ())
     {
       operands[3] = gen_reg_rtx (DImode);
       emit_move_insn (operands[3], operands[2]);
@@ -2988,7 +2989,8 @@
       && ! logical_operand (operands[2], SImode))
     {
       HOST_WIDE_INT value = INTVAL (operands[2]);
-      rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+      rtx tmp = ((!may_create_pseudo_p ()
+		  || rtx_equal_p (operands[0], operands[1]))
 		 ? operands[0] : gen_reg_rtx (SImode));
 
       emit_insn (gen_iorsi3 (tmp, operands[1],
@@ -3009,7 +3011,8 @@
       && ! logical_operand (operands[2], SImode))
     {
       HOST_WIDE_INT value = INTVAL (operands[2]);
-      rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+      rtx tmp = ((!may_create_pseudo_p ()
+		  || rtx_equal_p (operands[0], operands[1]))
 		 ? operands[0] : gen_reg_rtx (SImode));
 
       emit_insn (gen_xorsi3 (tmp, operands[1],
@@ -5797,7 +5800,7 @@
    (clobber (match_operand:SI 6 "gpc_reg_operand" "=&r"))]
   "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
   "#"
-  "&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[4]))"
+  "&& (may_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[4]))"
   [(pc)]
   "
 {
@@ -5867,7 +5870,7 @@
    (clobber (match_operand:DF 5 "gpc_reg_operand" "=&f"))]
   "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
   "#"
-  "&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[4]))"
+  "&& (may_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[4]))"
   [(pc)]
   "
 {
@@ -5933,7 +5936,7 @@
    (clobber (match_operand:DI 3 "memory_operand" "=o"))]
   "(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT && TARGET_FPRS"
   "#"
-  "&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[3]))"
+  "&& (may_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[3]))"
   [(pc)]
   "
 {
@@ -7649,7 +7652,8 @@
   if (non_logical_cint_operand (operands[2], DImode))
     {
       HOST_WIDE_INT value;
-      rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+      rtx tmp = ((!may_create_pseudo_p ()
+		  || rtx_equal_p (operands[0], operands[1]))
 		 ? operands[0] : gen_reg_rtx (DImode));
 
       if (GET_CODE (operands[2]) == CONST_INT)
@@ -7682,7 +7686,8 @@
   if (non_logical_cint_operand (operands[2], DImode))
     {
       HOST_WIDE_INT value;
-      rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+      rtx tmp = ((!may_create_pseudo_p ()
+		  || rtx_equal_p (operands[0], operands[1]))
 		 ? operands[0] : gen_reg_rtx (DImode));
 
       if (GET_CODE (operands[2]) == CONST_INT)
@@ -7960,7 +7965,9 @@
       value = INTVAL (offset);
       if (value != 0)
 	{
-	  rtx tmp = (no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode));
+	  rtx tmp = (!may_create_pseudo_p ()
+		     ? operands[0]
+		     : gen_reg_rtx (Pmode));
 	  emit_insn (gen_movsi_got (tmp, operands[1]));
 	  emit_insn (gen_addsi3 (operands[0], tmp, offset));
 	  DONE;
@@ -8771,7 +8778,7 @@
   "!TARGET_IEEEQUAD
    && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
   "#"
-  "&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[5]))"
+  "&& (may_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[5]))"
   [(pc)]
 {
   rtx lowword;
Index: config/darwin.c
===================================================================
--- config/darwin.c	(revision 126419)
+++ config/darwin.c	(working copy)
@@ -516,7 +516,7 @@ machopic_indirect_data_reference (rtx or
 	{
 #if defined (TARGET_TOC)
 	  /* Create a new register for CSE opportunities.  */
-	  rtx hi_reg = (no_new_pseudos ? reg : gen_reg_rtx (Pmode));
+	  rtx hi_reg = (!may_create_pseudo_p () ? reg : gen_reg_rtx (Pmode));
  	  emit_insn (gen_macho_high (hi_reg, orig));
  	  emit_insn (gen_macho_low (reg, hi_reg, orig));
 #else
@@ -533,7 +533,9 @@ machopic_indirect_data_reference (rtx or
 #endif
 
 #if defined (TARGET_TOC) /* i.e., PowerPC */
-	  rtx hi_sum_reg = (no_new_pseudos ? reg : gen_reg_rtx (Pmode));
+	  rtx hi_sum_reg = (!may_create_pseudo_p ()
+			    ? reg
+			    : gen_reg_rtx (Pmode));
 
 	  gcc_assert (reg);
 
@@ -705,7 +707,9 @@ machopic_legitimize_pic_address (rtx ori
 		  || GET_CODE (XEXP (orig, 0)) == LABEL_REF))
 	    {
 #if defined (TARGET_TOC)	/* ppc  */
-	      rtx temp_reg = (no_new_pseudos) ? reg : gen_reg_rtx (Pmode);
+	      rtx temp_reg = (!may_create_pseudo_p ()
+			      ? reg :
+			      gen_reg_rtx (Pmode));
 	      rtx asym = XEXP (orig, 0);
 	      rtx mem;
 
@@ -728,7 +732,9 @@ machopic_legitimize_pic_address (rtx ori
 #if defined (TARGET_TOC) /* i.e., PowerPC */
 	      /* Generating a new reg may expose opportunities for
 		 common subexpression elimination.  */
-              rtx hi_sum_reg = no_new_pseudos ? reg : gen_reg_rtx (Pmode);
+              rtx hi_sum_reg = (!may_create_pseudo_p ()
+				? reg
+				: gen_reg_rtx (Pmode));
 	      rtx mem;
 	      rtx insn;
 	      rtx sum;
Index: config/score/score.c
===================================================================
--- config/score/score.c	(revision 126419)
+++ config/score/score.c	(working copy)
@@ -181,7 +181,6 @@ th_output_mi_thunk (FILE *file, tree thu
   rtx this, temp1, temp2, insn, fnaddr;
 
   /* Pretend to be a post-reload pass while generating rtl.  */
-  no_new_pseudos = 1;
   reload_completed = 1;
 
   /* We need two temporary registers in some cases.  */
@@ -240,7 +239,6 @@ th_output_mi_thunk (FILE *file, tree thu
   /* Clean up the vars set above.  Note that final_end_function resets
      the global pointer for us.  */
   reload_completed = 0;
-  no_new_pseudos = 0;
 }
 
 /* Implement TARGET_STRICT_ARGUMENT_NAMING.  */
@@ -812,7 +810,7 @@ score_address_p (enum machine_mode mode,
 static rtx
 score_force_temporary (rtx dest, rtx value)
 {
-  if (!no_new_pseudos)
+  if (may_create_pseudo_p ())
     return force_reg (Pmode, value);
   else
     {
Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c	(revision 126419)
+++ config/arm/arm.c	(working copy)
@@ -3387,7 +3387,7 @@ require_pic_register (void)
      start the real expansion process.  */
   if (!current_function_uses_pic_offset_table)
     {
-      gcc_assert (!no_new_pseudos);
+      gcc_assert (may_create_pseudo_p ());
       if (arm_pic_register != INVALID_REGNUM)
 	{
 	  cfun->machine->pic_reg = gen_rtx_REG (Pmode, arm_pic_register);
@@ -3439,7 +3439,7 @@ legitimize_pic_address (rtx orig, enum m
 
       if (reg == 0)
 	{
-	  gcc_assert (!no_new_pseudos);
+	  gcc_assert (may_create_pseudo_p ());
 	  reg = gen_reg_rtx (Pmode);
 
 	  subregs = 1;
@@ -3503,7 +3503,7 @@ legitimize_pic_address (rtx orig, enum m
 
       if (reg == 0)
 	{
-	  gcc_assert (!no_new_pseudos);
+	  gcc_assert (may_create_pseudo_p ());
 	  reg = gen_reg_rtx (Pmode);
 	}
 
@@ -3519,7 +3519,7 @@ legitimize_pic_address (rtx orig, enum m
 	     test the index for the appropriate mode.  */
 	  if (!arm_legitimate_index_p (mode, offset, SET, 0))
 	    {
-	      gcc_assert (!no_new_pseudos);
+	      gcc_assert (may_create_pseudo_p ());
 	      offset = force_reg (Pmode, offset);
 	    }
 
@@ -3673,7 +3673,7 @@ arm_load_pic_register (unsigned long sav
 	    }
 	  else
 	    {
-	      gcc_assert (!no_new_pseudos);
+	      gcc_assert (may_create_pseudo_p ());
 	      pic_tmp = gen_reg_rtx (Pmode);
 	    }
 
Index: config/arm/arm.md
===================================================================
--- config/arm/arm.md	(revision 126419)
+++ config/arm/arm.md	(working copy)
@@ -490,7 +490,7 @@
     {
       arm_split_constant (PLUS, SImode, NULL_RTX,
 	                  INTVAL (operands[2]), operands[0], operands[1],
-			  optimize && !no_new_pseudos);
+			  optimize && may_create_pseudo_p ());
       DONE;
     }
   "
@@ -967,7 +967,7 @@
         {
           arm_split_constant (MINUS, SImode, NULL_RTX,
 	                      INTVAL (operands[1]), operands[0],
-	  		      operands[2], optimize && !no_new_pseudos);
+	  		      operands[2], optimize && may_create_pseudo_p ());
           DONE;
 	}
       else /* TARGET_THUMB1 */
@@ -1737,7 +1737,7 @@
         {
           arm_split_constant (AND, SImode, NULL_RTX,
 	                      INTVAL (operands[2]), operands[0],
-			      operands[1], optimize && !no_new_pseudos);
+			      operands[1], optimize && may_create_pseudo_p ());
 
           DONE;
         }
@@ -2398,7 +2398,7 @@
         {
           arm_split_constant (IOR, SImode, NULL_RTX,
 	                      INTVAL (operands[2]), operands[0], operands[1],
-			      optimize && !no_new_pseudos);
+			      optimize && may_create_pseudo_p ());
           DONE;
 	}
       else /* TARGET_THUMB1 */
@@ -4473,7 +4473,7 @@
 	(match_operand:DI 1 "general_operand" ""))]
   "TARGET_EITHER"
   "
-  if (!no_new_pseudos)
+  if (may_create_pseudo_p ())
     {
       if (GET_CODE (operands[0]) != REG)
 	operands[1] = force_reg (DImode, operands[1]);
@@ -4661,13 +4661,13 @@
         {
            arm_split_constant (SET, SImode, NULL_RTX,
 	                       INTVAL (operands[1]), operands[0], NULL_RTX,
-			       optimize && !no_new_pseudos);
+			       optimize && may_create_pseudo_p ());
           DONE;
         }
     }
   else /* TARGET_THUMB1...  */
     {
-      if (!no_new_pseudos)
+      if (may_create_pseudo_p ())
         {
           if (GET_CODE (operands[0]) != REG)
 	    operands[1] = force_reg (SImode, operands[1]);
@@ -4690,7 +4690,8 @@
       gcc_assert (GET_CODE (tmp) == SYMBOL_REF);
       gcc_assert (SYMBOL_REF_TLS_MODEL (tmp) != 0);
 
-      tmp = legitimize_tls_address (tmp, no_new_pseudos ? operands[0] : 0);
+      tmp = legitimize_tls_address (tmp,
+				    !may_create_pseudo_p () ? operands[0] : 0);
       if (addend)
         {
           tmp = gen_rtx_PLUS (SImode, tmp, addend);
@@ -4703,7 +4704,9 @@
 	       || symbol_mentioned_p (operands[1])
 	       || label_mentioned_p (operands[1])))
       operands[1] = legitimize_pic_address (operands[1], SImode,
-					    (no_new_pseudos ? operands[0] : 0));
+					    (!may_create_pseudo_p ()
+					     ? operands[0]
+					     : 0));
   "
 )
 
@@ -5086,7 +5089,7 @@
   "
   if (TARGET_ARM)
     {
-      if (!no_new_pseudos)
+      if (may_create_pseudo_p ())
         {
           if (GET_CODE (operands[0]) == MEM)
 	    {
@@ -5130,7 +5133,7 @@
 	      emit_insn (gen_movsi (reg, GEN_INT (val)));
 	      operands[1] = gen_lowpart (HImode, reg);
 	    }
-	  else if (arm_arch4 && optimize && !no_new_pseudos
+	  else if (arm_arch4 && optimize && may_create_pseudo_p ()
 		   && GET_CODE (operands[1]) == MEM)
 	    {
 	      rtx reg = gen_reg_rtx (SImode);
@@ -5193,7 +5196,7 @@
   else if (TARGET_THUMB2)
     {
       /* Thumb-2 can do everything except mem=mem and mem=const easily.  */
-      if (!no_new_pseudos)
+      if (may_create_pseudo_p ())
 	{
 	  if (GET_CODE (operands[0]) != REG)
 	    operands[1] = force_reg (HImode, operands[1]);
@@ -5210,7 +5213,7 @@
     }
   else /* TARGET_THUMB1 */
     {
-      if (!no_new_pseudos)
+      if (may_create_pseudo_p ())
         {
 	  if (GET_CODE (operands[1]) == CONST_INT)
 	    {
@@ -5440,7 +5443,7 @@
   "
   /* Everything except mem = const or mem = mem can be done easily */
 
-  if (!no_new_pseudos)
+  if (may_create_pseudo_p ())
     {
       if (GET_CODE (operands[1]) == CONST_INT)
 	{
@@ -5548,7 +5551,7 @@
     }
   else /* TARGET_THUMB1 */
     {
-      if (!no_new_pseudos)
+      if (may_create_pseudo_p ())
         {
            if (GET_CODE (operands[0]) != REG)
 	     operands[1] = force_reg (SFmode, operands[1]);
@@ -5624,7 +5627,7 @@
     }
   else /* TARGET_THUMB */
     {
-      if (!no_new_pseudos)
+      if (may_create_pseudo_p ())
         {
           if (GET_CODE (operands[0]) != REG)
 	    operands[1] = force_reg (DFmode, operands[1]);
Index: config/pa/pa.md
===================================================================
--- config/pa/pa.md	(revision 126419)
+++ config/pa/pa.md	(working copy)
@@ -4434,7 +4434,7 @@
   /* Except for zero, we don't support loading a CONST_INT directly
      to a hard floating-point register since a scratch register is
      needed for the operation.  While the operation could be handled
-     before no_new_pseudos is true, the simplest solution is to fail.  */
+     before register allocation, the simplest solution is to fail.  */
   if (TARGET_64BIT
       && GET_CODE (operands[1]) == CONST_INT
       && operands[1] != CONST0_RTX (DImode)
Index: config/pa/pa.c
===================================================================
--- config/pa/pa.c	(revision 126419)
+++ config/pa/pa.c	(working copy)
@@ -1377,8 +1377,7 @@ emit_move_sequence (rtx *operands, enum 
      addresses from the destination operand.  */
   if (GET_CODE (operand0) == MEM && IS_INDEX_ADDR_P (XEXP (operand0, 0)))
     {
-      /* This is only safe up to the beginning of life analysis.  */
-      gcc_assert (!no_new_pseudos);
+      gcc_assert (may_create_pseudo_p ());
 
       tem = copy_to_mode_reg (Pmode, XEXP (operand0, 0));
       operand0 = replace_equiv_address (operand0, tem);
Index: config/mips/mips.c
===================================================================
--- config/mips/mips.c	(revision 126419)
+++ config/mips/mips.c	(working copy)
@@ -2097,7 +2097,7 @@ mips_legitimate_address_p (enum machine_
 static rtx
 mips_force_temporary (rtx dest, rtx value)
 {
-  if (!no_new_pseudos)
+  if (may_create_pseudo_p ())
     return force_reg (Pmode, value);
   else
     {
@@ -2117,7 +2117,7 @@ mips_split_symbol (rtx temp, rtx addr)
 
   if (!TARGET_MIPS16)
     high = mips_force_temporary (temp, gen_rtx_HIGH (Pmode, copy_rtx (addr)));
-  else if (no_new_pseudos)
+  else if (!may_create_pseudo_p ())
     {
       emit_insn (gen_load_const_gp (copy_rtx (temp)));
       high = temp;
@@ -2468,7 +2468,7 @@ mips_move_integer (rtx dest, rtx temp, u
   x = GEN_INT (codes[0].value);
   for (i = 1; i < cost; i++)
     {
-      if (no_new_pseudos)
+      if (!may_create_pseudo_p ())
 	{
 	  emit_insn (gen_rtx_SET (VOIDmode, temp, x));
 	  x = temp;
@@ -2517,7 +2517,7 @@ mips_legitimize_const_move (enum machine
   split_const (src, &base, &offset);
   if (!TARGET_MIPS16
       && offset != const0_rtx
-      && (!no_new_pseudos || SMALL_INT (offset)))
+      && (may_create_pseudo_p () || SMALL_INT (offset)))
     {
       base = mips_force_temporary (dest, base);
       emit_move_insn (dest, mips_add_offset (0, base, INTVAL (offset)));
@@ -7957,7 +7957,6 @@ mips_output_mi_thunk (FILE *file, tree t
   rtx this, temp1, temp2, insn, fnaddr;
 
   /* Pretend to be a post-reload pass while generating rtl.  */
-  no_new_pseudos = 1;
   reload_completed = 1;
 
   /* Mark the end of the (empty) prologue.  */
@@ -8067,7 +8066,6 @@ mips_output_mi_thunk (FILE *file, tree t
   /* Clean up the vars set above.  Note that final_end_function resets
      the global pointer for us.  */
   reload_completed = 0;
-  no_new_pseudos = 0;
 }
 
 /* Returns nonzero if X contains a SYMBOL_REF.  */
Index: config/h8300/h8300.md
===================================================================
--- config/h8300/h8300.md	(revision 126419)
+++ config/h8300/h8300.md	(working copy)
@@ -3251,7 +3251,7 @@
 	    }
           if (! bit_memory_operand (operands[0], GET_MODE (operands[0])))
 	    {
-	      if (no_new_pseudos)
+	      if (!may_create_pseudo_p ())
 		FAIL;
 	      operands[0] =
 	        replace_equiv_address (operands[0],
@@ -3263,7 +3263,7 @@
 	    FAIL;
 	  if (! register_operand (operands[3], QImode))
 	    {
-	      if (no_new_pseudos)
+	      if (!may_create_pseudo_p ())
 		FAIL;
 	      operands[3] = force_reg (QImode, operands[3]);
 	    }
@@ -3323,7 +3323,7 @@
 		  == MODE_INT))
 	    operands[0] = SUBREG_REG (operands[0]);
 
-	  if (no_new_pseudos)
+	  if (!may_create_pseudo_p ())
 	    temp = gen_lowpart (QImode, operands[0]);
 	  else
 	    temp = gen_reg_rtx (QImode);
@@ -3331,7 +3331,7 @@
 	    FAIL;
           if (! bit_memory_operand (operands[1], QImode))
 	    {
-	      if (no_new_pseudos)
+	      if (!may_create_pseudo_p ())
 		FAIL;
 	      operands[1] =
 	        replace_equiv_address (operands[1],
Index: config/bfin/bfin.c
===================================================================
--- config/bfin/bfin.c	(revision 126419)
+++ config/bfin/bfin.c	(working copy)
@@ -181,7 +181,7 @@ legitimize_pic_address (rtx orig, rtx re
 
       if (reg == 0)
 	{
-	  gcc_assert (!no_new_pseudos);
+	  gcc_assert (may_create_pseudo_p ());
 	  reg = gen_reg_rtx (Pmode);
 	}
 
@@ -209,7 +209,7 @@ legitimize_pic_address (rtx orig, rtx re
 
       if (reg == 0)
 	{
-	  gcc_assert (!no_new_pseudos);
+	  gcc_assert (may_create_pseudo_p ());
 	  reg = gen_reg_rtx (Pmode);
 	}
 

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