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Re: paired register loads and stores
- From: Rask Ingemann Lambertsen <rask at sygehus dot dk>
- To: David Edelsohn <dje at watson dot ibm dot com>
- Cc: Erich Plondke <eplondke at gmail dot com>, gcc <gcc at gcc dot gnu dot org>
- Date: Wed, 25 Apr 2007 10:21:24 +0200
- Subject: Re: paired register loads and stores
- References: <eplondke@gmail.com> <deb8826f0609282227x6b7e96f7s141fc04abaf78372@mail.gmail.com> <200609291308.k8TD8pV33968@makai.watson.ibm.com> <deb8826f0609290641v18897830u620595965ac1febf@mail.gmail.com> <200609291352.k8TDqwV28032@makai.watson.ibm.com>
On Fri, Sep 29, 2006 at 09:52:58AM -0400, David Edelsohn wrote:
>
> The GCC register allocator allocates objects that span multiple
> registers in adjacent registers. For instance, a 64-bit doubleword
> integer (long long int) will be allocated in two adjacent hardware
> registers when GCC is targeted at a processor with 32-bit registers.
Btw, this is no longer true unless you pass -fno-split-wide-types.
--
Rask Ingemann Lambertsen