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Re: How can I get VRP information for an RTX?


Andrew Pinski wrote:
On 4/1/07, David Daney <ddaney@avtrex.com> wrote:
I am looking at how the MIPS backend handles division.  For the compiler
configuration in question (mipsel-linux) division operations trap on
division by zero.  This is handled in mips_output_division in mips.c
where we unconditionally emit a conditional trap.

Why does the back-end emit a trap for divide by zero if the hardware does not handle it? Division by zero is undefined by the C/C++ standard so maybe you should just add an option to the MIPS back-end not to emit the trap.
There *is* such an option.

The issue is that for some things (the java front-end) we need the trapping behavior. I just want to optimize it if the divisor is known to be non-zero. VRP knows, but by the time we generate the code it seems that we have forgotten.

David Daney


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