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Re: error: unable to find a register to spill in class 'FP_REGS'
Markus Franke wrote:
That means the compiler has to reload the pseudo registers 92 and 93 for
this instruction, right?
First we do register allocation. Then, after register allocation, if
the chosen hard registers don't match the constraints, then we use
reload to fix it.
The relevant data for instruction 45 in .greg looks like that:
Insn 45 in the greg dump looks nothing like the insn 45 in the expand
dump, which means you are looking at the wrong insn here. But it was
insn 45 in the original mail. Did you change the testcase perhaps? Or
use different optimization options?
The info we are looking for should look something like this
Reloads for insn # 13
Reload 0: reload_out (SI) = (reg:SI 97)
R1_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
reload_out_reg: (reg:SI 97)
reload_reg_rtx: (reg:SI 1 %r1)
;; Register 92 in 9.
;; Register 93 in 10.
This tells us that pseudo 92 was allocated to hard reg 9, and pseudo 93
was allocated to hard reg 10. I didn't see reg class preferencing info
for these regs, but maybe it is in one of the other dump files.
The earlier message has rtl claiming that pseudo 92 got allocated to
register 1 (r1). I seem to be getting inconsistent information here.
--
Jim Wilson, GNU Tools Support, http://www.specifix.com