Re: About Loop Pattern ----GCC porting

[Ian Lance Taylor <iant at google dot com>]

"redriver jiang" <jiangpeople@gmail.com> writes:

>        I am Jiang Hongjiang and recently I am porting the GCC backend
> to a DSP, and get puzzled about the "decrement_and_branch_until_zero"
> pattern.By Reading the GCC source, I find that this pattern is used in
> loop optimization, and it's used under the condition of defining the
> "doloop_end" pattern. Inspired by the c4x machine description file(
> c4x.md), I defined the "doloop_end" pattern using "define_expand", and
> generate the "decrement_and_branch_until_zero" insn in the preparation
> statements. Right now the GCC can generate the
> "decrement_and_branch_until_zero" insns and its related assemble
> insn(in my platform it is "DJNZ Rn,lable"), but I find that the GCC
> remains other insns(the cmp insns and other) unchanged. How do you
> delete the "CMP" insn and other insn in the loop while using the
> "decrement_and_branch_until_zero" pattern? The accessory demonstrates
> a example.

Normally the compare instruction is removed later because it is
unused: it is nonvolatile and nothing uses the result.  You must
determine why the compiler thinks that the compare instruction is
still used.

Ian