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Porting GCC to new architecture


Hi,
I'm Alex Tzannes and I am porting GCC 4.0.2 to a new experimental parallel
architecture. Here's one issue I don't know how to go about. The ISA of
our machine is based on MIPS (so I made a copy of the MIPS back end and
have been modifying that). One conceptual difference is that the machine
can be either in serial mode or in parallel mode. The switch from serial
to parallel happens with a 'spawn' instruction, and the swich from
parallel to serial with a 'join' instruction. This is important because
the ISA instructions that can be used in serial and in parallel mode are
different !

For example let's say mvtg is an instruction that can only be used in
'serial mode'. I currently have a template in the back end (.md file) that
generates that instruction when it is needed. The only thing I don't know
how to check is that it is only generated in serial mode.

Instruction attributes do not seem like the solution because there seems
to be no other way to set them besides in the RTL rules in the .md file
(which is too late; I would want to read the information at that point).

Is there a way to annotate each RTL instruction and to check that during
code generation ? Has a similar problem been solved in some other
back-end?

Thank you,
Alex


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