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Request: -mtune=athlon64v
- From: "Erdem U. Altunyurt" <eua at dsl dot ttnet dot net dot tr>
- To: gcc at gcc dot gnu dot org
- Date: Mon, 19 Feb 2007 02:12:22 +0200
- Subject: Request: -mtune=athlon64v
- References: <1171673395.26209.ezmlm@gcc.gnu.org>
Hi,
Is it possible to add a new micro architecture to gcc,g++?
k8, opteron, athlon64, athlon-fx which make
AMD K8 core based CPUs with x86-64 instruction set support. (This
supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit
instruction set extensions.)
But newer athlons has support SSE3 like venice core. I think it's better
to make new cpu identifier athlon64 venice, in short format "athlon64v"
or "athlon64+". "k8+" is looks good too.
I remembered that Athlon64 SSE3 is different than intels one.
"MONITOR, MWAIT" is not implemented in Athlon SSE3 AFAIK because absence
of hyperthreading but its not a big problem to implement, current -msse3
is working good with AMD SSE3 platforms AFAIK.
What are you think about it?