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Re: Controlling Register Allocation - GCC 4.1.1
- From: Ian Lance Taylor <iant at google dot com>
- To: "Rohit Arul Raj" <rohitarulraj at gmail dot com>
- Cc: gcc <gcc at gcc dot gnu dot org>
- Date: 19 Jan 2007 07:34:06 -0800
- Subject: Re: Controlling Register Allocation - GCC 4.1.1
- References: <c356fd4e0701190233o7a476834ub146d6fdd5e09ccf@mail.gmail.com>
"Rohit Arul Raj" <rohitarulraj@gmail.com> writes:
> I am having some problem while allocating floating point registers in GCC 4.1.1.
> As of now my target does not have floating point registers. To support
> floating point operations, i added 8 floating point registers that i
> want the gcc to allocate only when the mode is MODE_FLOAT.
I wish I could change my targets by simply changing the compiler.
> I have done the following:
> 1. Defined them in FIXED_REGISTERS, CALL_USED_REGISTERS.
> 2. Ordered them using REG_ALLOC_ORDER.
> 3. Created a separate class in enum reg_class (FLOAT).
> 4. Assigned a specific character to identify the particular class ('f').
> 5. Defined HARD_REGNO_MODE_OK such that if a float-register is used in
> any other mode, it should return 0.
>
> Still while emitting the insns, i get the floating point registers f0
> (Reg No 16) in SI mode.
>
> (insn/f 39 38 40 (set:SI (mem:SI (pre_dec:SI (reg/f:SI 15 a7)) [0 S4 A32])
> (reg:SI 16 f0)) 0 {movsi_push} (nil)
> (nil))
>
> Have i missed out on anything?
I think you want HARD_REGNO_MODE_OK.
Ian