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Re: 32 bit jump instruction.
- From: "Steven Bosscher" <stevenb dot gcc at gmail dot com>
- To: "Joern Rennecke" <amylaar at spamcop dot net>
- Cc: "Rohit Arul Raj" <rohitarulraj at gmail dot com>, "Ian Lance Taylor" <iant at google dot com>, "David Daney" <ddaney at avtrex dot com>, gcc <gcc at gcc dot gnu dot org>
- Date: Wed, 13 Dec 2006 11:02:44 +0100
- Subject: Re: 32 bit jump instruction.
- References: <20061213030524.7chf14c844owsck4@webmail.spamcop.net>
On 12/13/06, Joern Rennecke <amylaar@spamcop.net> wrote:
In http://gcc.gnu.org/ml/gcc/2006-12/msg00328.html, you wrote:
However, because the SH has delayed branches, there is always a guaranteed way
to find a register - one can be saved, and then be restored in the delay slot.
Heh, that's an interesting feature :-)
How does that work? I always thought that the semantics of delayed
insns is that the insn in the delay slot is executed *before* the
branch. But that is apparently not the case, or the branch register
would have been over-written before the branch. How does that work on
SH?
Gr.
Steven