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Re: 32 bit jump instruction.
- From: Joern Rennecke <amylaar at spamcop dot net>
- To: Rohit Arul Raj <rohitarulraj at gmail dot com>
- Cc: Ian Lance Taylor <iant at google dot com>, David Daney <ddaney at avtrex dot com>, gcc <gcc at gcc dot gnu dot org>
- Date: Wed, 13 Dec 2006 03:05:24 -0500
- Subject: Re: 32 bit jump instruction.
In http://gcc.gnu.org/ml/gcc/2006-12/msg00328.html, you wrote:
>> On 06 Dec 2006 23:13:35 -0800, Ian Lance Taylor <iant@google.com> wrote:
>> If you can't afford to lose a register, then I think your only option
>> is to pick some callee-saved register and have each branch instruction
>> explicitly clobber it. Then it will be available for use in a long
>> branch, and it will be available for use within a basic block. This
>> is far from ideal, but I don't know a better way to handle it within
>> gcc's current framework.
> Can i get more clarity on this part. Is it implemented in any other backends?
> When you say "pick some callee-saved register ", is it to pick them
> randomly from an available set in CALL_USED_REGISTERS or a specific
> register.
The SH does register scavenging, and sharing of far branches. Look at
config/sh/sh.c:split_branches . Also see PR 29336 for how this could be better
integrated with machine-specific constant pool placement.
However, because the SH has delayed branches, there is always a guaranteed way
to find a register - one can be saved, and then be restored in the delay slot.
An architecture without delay slots would have to have another fallback
mechanism, e.g. inserting a register restore before the target - possibly with
a short jump around it, duplicate instructions from the target till a register
dies, or inserting a register restore and jump in the vincinity of the target.